ICS840001I-25
FEMTOCLOCK™ LVCMOS/LVTTL CLOCK GENERATOR
FEMTOCLOCK™
LVCMOS/LVTTL CLOCK GENERATOR
ICS840001I-25
G
ENERAL
D
ESCRIPTION
The ICS840001I-25 is a General Purpose Clock
Generator and a member of the HiPerClocks
TM
fam-
HiPerClockS™
ily of high performance devices from IDT. The
ICS840001I-25 can accept frequency from a
22.4MHz to 170MHz and generate a 22.4MHz to
170MHz output. The ICS840001I-25 has excellent phase jitter
performance, from 637kHz – 10MHz integration range. The
ICS840001I-25 is packaged in a small 8-pin TSSOP, making it
ideal for use in systems with limited board space.
F
EATURES
•
One LVCMOS/LVTTL output, 15Ω output impedence
•
Output frequency range: 22.4MHz – 170MHz
•
VCO range: 560MHz to 680MHz
•
RMS phase jitter @ 125MHz (637kHz - 10MHz): 0.36ps (typical)
•
Full 3.3V or 2.5V operating supply
•
-40°C to 85°C ambient operating temperature
•
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IC
S
C
OMMONLY
U
SED
F
REQUENCY
T
ABLE
Inputs
SEL2
0
0
0
0
1
1
1
1
SEL1
0
0
1
1
0
0
1
1
SEL0
0
1
0
1
0
1
0
1
M Divider
25
10
4
5
10
5
4
10
N Divider
25
25
25
25
10
5
4
25
REF_IN (MHz)
25
62.5
156.25
125
62.5
125
156.25
62.5
Output Frequency (MHz)
Q
25
25
25
25
62.5
125
156.25
25 (default)
B
LOCK
D
IAGRAM
N
REF_IN
Pullup
P
IN
A
SSIGNMENT
VCO
560-680MHz
÷4
÷5
÷10
÷25
Q
V
DD
REF_IN
SEL_0
SEL_1
1
2
3
4
8
7
6
5
Q
V
DDO
GND
SEL_2
Phase
Detector
M
÷4, ÷5, ÷10, ÷25
SEL_[0:2]
Pullup
3
ICS840001I-25
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
IDT
™
/ ICS
™
LVCMOS CLOCK GENERATOR
1
ICS840001BGI-25 REV. A MARCH 31, 2009
ICS840001I-25
FEMTOCLOCK™ LVCMOS/LVTTL CLOCK GENERATOR
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1
2
3, 4, 5
6
7
Name
V
DD
REF_IN
SEL_0, SEL_1, SEL_2
GND
V
DDO
Power
Input
Input
Power
Power
Pullup
Pullup
Type
Description
Positive supply pin.
Reference input frequency. LVCMOS/LVTTL interface levels.
M and N configuration select pins.
LVCMOS/LVTTL interface levels.
Power supply ground.
Output supply pin.
Single-ended clock output. LVCMOS/LVTTL interface levels.
8
Q
Output
15
Ω
output impedance.
NOTE:
Pullup
refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
C
PD
R
PULLUP
R
OUT
Parameter
Input Capacitance
Power Dissipation Capacitance
Input Pullup Resistor
Output Impedance
V
DD
, V
DDO
= 3.465V
V
DD
, V
DDO
= 2.625V
Test Conditions
Minimum
Typical
4
6
5
51
15
Maximum
Units
pF
pF
pF
kΩ
Ω
IDT
™
/ ICS
™
LVCMOS CLOCK GENERATOR
2
ICS840001BGI-25 REV. A MARCH 31, 2009
ICS840001I-25
FEMTOCLOCK™ LVCMOS/LVTTL CLOCK GENERATOR
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
Inputs, V
I
Outputs, V
O
4.6V
-0.5V to V
DD
+ 0.5 V
-0.5V to V
DDO
+ 0.5V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
Package Thermal Impedance,
θ
JA
129.5°C/W (0 mps)
Storage Temperature, T
STG
-65°C to 150°C
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
No Load
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
83
2
Units
V
V
mA
mA
T
ABLE
3B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
=2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
No Load
Test Conditions
Minimum
2.375
2.375
Typical
2.5
2.5
Maximum
2.625
2.625
80
2
Units
V
V
mA
mA
T
ABLE
3C. LVCMOS/LVTTL DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5%
OR
2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
IH
V
IL
I
IH
I
IL
V
OH
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
REF_IN,
SEL_[0:2]
REF_IN,
SEL_[0:2]
Test Conditions
V
DD
= 3.465V
V
DD
= 2.625V
V
DD
= 3.465V
V
DD
= 2.625V
V
DD
= V
IN
= 3.465V or 2.625V
V
DD
= 3.465V or 2.625V, V
IN
= 0V
V
DDO
= 3.465V
V
DDO
= 2.625V
-150
2.6
1.8
0.6
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
V
DD
+ 0.3
V
DD
+ 0.3
0.8
0.7
5
Units
V
V
V
V
µA
µA
V
V
V
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
V
DDO
= 3.465V or 2.625V
V
OL
NOTE 1: Outputs terminated with 50
Ω
to V
DDO
/2. See Parameter Measurement Information Section,
"Output Load Test Circuit" diagrams.
IDT
™
/ ICS
™
LVCMOS CLOCK GENERATOR
3
ICS840001BGI-25 REV. A MARCH 31, 2009
ICS840001I-25
FEMTOCLOCK™ LVCMOS/LVTTL CLOCK GENERATOR
T
ABLE
4A. AC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
125MHz, Integration Range:
637kHz - 10MHz
156.25MHz, Integration Range:
637kHz - 10MHz
20% to 80%
Test Conditions
Minimum
22.4
0.37
0.38
150
47
650
53
Typical
Maximum
170
Units
MHz
ps
ps
ps
%
t
jit(Ø)
t
R
/ t
F
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plot.
T
ABLE
4B. AC C
HARACTERISTICS
,
V
DD
= V
DDO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
125MHz, Integration Range:
637kHz - 10MHz
156.25MHz, Integration Range:
637kHz - 10MHz
20% to 80%
Test Conditions
Minimum
22.4
0.36
0.35
150
47
650
53
Typical
Maximum
170
Units
MHz
ps
ps
ps
%
t
jit(Ø)
t
R
/ t
F
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plot.
IDT
™
/ ICS
™
LVCMOS CLOCK GENERATOR
4
ICS840001BGI-25 REV. A MARCH 31, 2009
ICS840001I-25
FEMTOCLOCK™ LVCMOS/LVTTL CLOCK GENERATOR
T
YPICAL
P
HASE
N
OISE AT
125MH
Z
@ 3.3V
125MHz
➤
Filter
RMS Phase Jitter (Random)
637kHz to 10MHz = 0.37ps (typical)
N
OISE
P
OWER
dBc
Hz
Raw Phase Noise Data
➤
T
YPICAL
P
HASE
N
OISE
156.25MHz
RMS Phase Jitter (Random)
637kHz to 10MHz = 0.38ps (typical)
N
OISE
P
OWER
dBc
Hz
➤
Filter
Raw Phase Noise Data
➤
IDT
™
/ ICS
™
LVCMOS CLOCK GENERATOR
5
➤
Phase Noise Result by adding
a Filter to raw data
O
FFSET
F
REQUENCY
(H
Z
)
AT
156.25MH
Z
@ 3.3V
O
FFSET
F
REQUENCY
(H
Z
)
➤
Phase Noise Result by adding
a Filter to raw data
ICS840001BGI-25 REV. A MARCH 31, 2009
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