+ 0.5 V) or 2.5 V (whichever is greater), EN1 = EN2 = V
IN
, I
OUT1
= I
OUT2
= 10 mA, C
IN
= C
OUT1
= C
OUT2
= 1 µF, T
A
= 25°C,
unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
WITH BOTH REGULATORS ON
Symbol
V
IN
I
GND
Test Conditions/Comments
T
J
= −40°C to +125°C
I
OUT
= 0 µA
I
OUT
= 0 µA, T
J
= −40°C to +125°C
I
OUT
= 10 mA
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 300 mA
I
OUT
= 300 mA, T
J
= −40°C to +125°C
EN1 = EN2 = GND
T
J
= −40°C to +125°C
I
OUT
= 10 mA
0 µA < I
OUT
< 300 mA, V
IN
= (V
OUT
+ 0.5 V) to 5.5 V
T
J
= −40°C to +125°C
I
OUT
= 10 mA
0 µA < I
OUT
< 300 mA, V
IN
= (V
OUT
+ 0.5 V) to 5.5 V
V
IN
= (V
OUT
+ 0.5 V) to 5.5 V
V
IN
= (V
OUT
+ 0.5 V) to 5.5 V, T
J
= −40°C to +125°C
I
OUT
= 1 mA to 300 mA
I
OUT
= 1 mA to 300 mA, T
J
= −40°C to +125°C
V
OUT
= 3.3 V
I
OUT
= 10 mA
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 300 mA
I
OUT
= 300 mA, T
J
= −40°C to +125°C A
2.5 V ≤ V
IN
≤ 5.5 V, SENSEx connected to VOUTx
2.5 V ≤ V
IN
≤ 5.5 V, ADJx connected to VOUTx
V
OUT
= 3.3 V
V
OUT
= 0.8 V
Min
2.5
Typ
65
150
100
200
300
0.2
−1
−2
450
2
+1
+2
Max
5.5
Unit
V
µA
µA
µA
µA
µA
µA
µA
%
%
SHUTDOWN CURRENT
OUTPUT VOLTAGE ACCURACY
1
I
GND-SD
V
OUT
ADJUSTABLE-OUTPUT VOLTAGE
ACCURACY
1
V
ADJ
0.495
0.490
−0.05
0.500
0.01
0.505
0.510
+0.05
LINE REGULATION
LOAD REGULATION
2
ΔV
OUT
/ΔV
IN
ΔV
OUT
/ΔI
OUT
V
DROPOUT
0.001
0.002
6
9
170
260
10
10
240
100
400
155
15
1.2
0.4
0.1
1
2.45
2.2
120
1000
140
V
V
%/V
%/V
%/mA
%/mA
mV
mV
mV
mV
nA
nA
µs
µs
mA
°C
°C
V
V
µA
µA
V
V
mV
µs
Ω
DROPOUT VOLTAGE
3
SENSE INPUT BIAS CURRENT
ADJx INPUT BIAS CURRENT
START-UP TIME
4
CURRENT-LIMIT THRESHOLD
5
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Leakage Current
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
OUTPUT DISCHARGE TIME
OUTPUT DISCHARGE RESISTANCE
SENSE
I-BIAS
ADJ
I-BIAS
t
START-UP
I
LIMIT
TS
SD
TS
SD-HYS
V
IH
V
IL
V
I-LEAKAGE
UVLO
UVLO
RISE
UVLO
FALL
UVLO
HYS
t
DIS
R
QOD
340
T
J
rising
2.5 V ≤ V
IN
≤ 5.5 V
2.5 V ≤ V
IN
≤ 5.5 V
EN1 = EN2 = V
IN
or GND
EN1 = EN2 = V
IN
or GND, T
J
= −40°C to +125°C
V
OUT
= 2.8 V
Rev. E | Page 3 of 24
ADP222/ADP223/ADP224/ADP225
Parameter
OUTPUT NOISE
Symbol
OUT
NOISE
Test Conditions/Comments
10 Hz to 100 kHz, V
IN
= 5 V, V
OUT
= 3.3 V
10 Hz to 100 kHz, V
IN
= 5 V, V
OUT
= 2.8 V
10 Hz to 100 kHz, V
IN
= 3.6 V, V
OUT
= 2.5 V
10 Hz to 100 kHz, V
IN
= 3.6 V, V
OUT
= 1.2 V
V
IN
= 2.5 V, V
OUT
= 0.8 V, I
OUT
= 100 mA
100 Hz
1 kHz
10 kHz
100 kHz
1 MHz
V
IN
= 3.8 V, V
OUT
= 2.8 V, I
OUT
= 100 mA
100 Hz
1 kHz
10 kHz
100 kHz
1 MHz
Min
Typ
56
50
45
27
76
76
70
60
40
68
68
68
60
40
Data Sheet
Max
Unit
µV rms
µV rms
µV rms
µV rms
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
POWER SUPPLY REJECTION RATIO
PSRR
Accuracy when VOUTx is connected directly to ADJx or SENSEx. When the VOUTx voltage is set by external feedback resistors, the absolute accuracy in adjust mode
depends on the tolerances of resistors used.
2
Based on an end-point calculation using 1 mA and 300 mA loads.
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.5 V.
4
Start-up time is defined as the time between the rising edge of EN to V
OUT
being at 90% of its nominal value.
5
Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
1
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
The minimum input and output capacitance should be greater than 0.70 µF over the full range of the operating conditions. The full range of the
operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification
is met. X7R and X5R type capacitors are recommended for use with the LDOs, but Y5V and Z5U capacitors are not recommended for use
with the LDOs.
Table 2.
Parameter
MINIMUM INPUT AND OUTPUT CAPACITANCE
CAPACITOR ESR
Symbol
C
MIN
R
ESR
Conditions
T
A
= −40°C to +125°C
T
A
= −40°C to +125°C
Min
0.70
0.001
Typ
Max
1
Unit
µF
Ω
Rev. E | Page 4 of 24
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
ADJ1, ADJ2, VOUT1, VOUT2 to GND
EN1, EN2 to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.3 V to +6 V
−0.3 V to VIN
−0.3 V to +6 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
ADP222/ADP223/ADP224/ADP225
Junction-to-ambient thermal resistance (θ
JA
) of the package is
based on modeling and calculation using a 4-layer board. θ
JA
is highly dependent on the application and board layout. In
applications where high maximum power dissipation exists,
close attention to thermal board design is required. The value
of θ
JA
may vary, depending on PCB material, layout, and
environmental conditions. The specified value of θ
JA
is based
on a 4-layer, 4 in × 3 in, 2½ oz copper board, as per JEDEC
standards. For more information, see the
AN-772
Application
Note,
A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
Ψ
JB
is the junction-to-board thermal characterization parameter
with units of °C/W. Ψ
JB
of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12,
Guidelines for
Reporting and Using Package Thermal Information,
states that
thermal characterization parameters are not the same as thermal
resistances. Ψ
JB
measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θ
JB
. Therefore, Ψ
JB
thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make Ψ
JB
more useful in real-world
applications. Maximum junction temperature (T
J
) is calculated
from the board temperature (T
B
) and power dissipation (P
D
)
using the formula
T
J
=
T
B
+ (P
D
× Ψ
JB
)
Refer to JESD51-8 and JESD51-12 for more detailed
information about Ψ
JB
.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The
ADP222/ADP223/ADP224/ADP225
can be damaged when
the junction temperature limits are exceeded. Monitoring
ambient temperature does not guarantee that T
J
is within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may have to be derated. In applications with
moderate power dissipation and low PCB thermal resistance, the
maximum ambient temperature can exceed the maximum limit as
long as the junction temperature is within specification limits.
The junction temperature (T
J
) of the device is dependent on the
ambient temperature (T
A
), the power dissipation of the device
(P
D
), and the junction-to-ambient thermal resistance of the
package (θ
JA
). Maximum junction temperature (T
J
) is calculated
from the ambient temperature (T
A
) and power dissipation (P
D
)
using the formula
T
J
=
T
A
+ (P
D
×
θ
JA
)
THERMAL RESISTANCE
θ
JA
and Ψ
JB
are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
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