MPSW51, MPSW51A
One Watt High Current
Transistors
PNP Silicon
Features
http://onsemi.com
COLLECTOR
3
•
These Devices are Pb−Free and are RoHS Compliant*
MAXIMUM RATINGS
Rating
Collector
−Emitter
Voltage
MPSW51
MPSW51A
MPSW51
MPSW51A
Symbol
V
CEO
Value
−30
−40
−40
−50
−5.0
−1000
1.0
8.0
2.5
20
−55
to +150
Unit
Vdc
2
BASE
1
EMITTER
Collector
−Base
Voltage
V
CBO
Vdc
Emitter
−Base
Voltage
Collector Current
−
Continuous
Total Device Dissipation @ T
A
= 25°C
Derate above 25°C
Total Device Dissipation @ T
C
= 25°C
Derate above 25°C
Operating and Storage Junction
Temperature Range
V
EBO
I
C
P
D
P
D
T
J
, T
stg
Vdc
mAdc
mW
mW/°C
W
mW/°C
°C
12
1
2
TO−92 1 WATT
(TO−226)
CASE 29−10
STYLE 1
3
STRAIGHT LEAD
3
BENT LEAD
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Symbol
R
qJA
R
qJC
Max
125
50
Unit
°C/W
°C/W
MPS
W51x
AYWW
G
G
MARKING DIAGRAM
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
x
= 51A Devices
A
= Assembly Location
Y
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2013
June, 2013
−
Rev. 5
1
Publication Order Number:
MPSW51/D
MPSW51, MPSW51A
PACKAGE DIMENSIONS
TO−92 (TO−226) 1 WATT
CASE 29−10
ISSUE A
A
STRAIGHT LEAD
R
P
F
L
K
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS
UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN DIMENSIONS P
AND L. DIMENSIONS D AND J APPLY BETWEEN DI
MENSIONS L AND K MINIMUM. THE LEAD
DIMENSIONS ARE UNCONTROLLED IN DIMENSION
P AND BEYOND DIMENSION K MINIMUM.
DIM
A
B
C
D
F
G
H
J
K
L
N
P
R
V
INCHES
MIN
MAX
0.175
0.205
0.290
0.310
0.125
0.165
0.018
0.021
0.016
0.019
0.045
0.055
0.095
0.105
0.018
0.024
0.500
---
0.250
---
0.080
0.105
---
0.100
0.135
---
0.135
---
MILLIMETERS
MIN
MAX
4.44
5.21
7.37
7.87
3.18
4.19
0.46
0.53
0.41
0.48
1.15
1.39
2.42
2.66
0.46
0.61
12.70
---
6.35
---
2.04
2.66
---
2.54
3.43
---
3.43
---
X X
H
V
1
D
G
J
C
N
N
SECTION X−X
STYLE 1:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
A
R
B
P
T
SEATING
PLANE
BENT LEAD
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS
UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN DIMENSIONS P
AND L. DIMENSIONS D AND J APPLY BETWEEN
DIMENSIONS L AND K MINIMUM. THE LEAD
DIMENSIONS ARE UNCONTROLLED IN DIMENSION
P AND BEYOND DIMENSION K MINIMUM.
DIM
A
B
C
D
G
J
K
N
P
R
V
INCHES
MIN
MAX
0.175
0.205
0.290
0.310
0.125
0.165
0.018
0.021
0.094
0.102
0.018
0.024
0.500
---
0.080
0.105
---
0.100
0.135
---
0.135
---
MILLIMETERS
MIN
MAX
4.44
5.21
7.37
7.87
3.18
4.19
0.46
0.53
2.40
2.80
0.46
0.61
12.70
---
2.04
2.66
---
2.54
3.43
---
3.43
---
G
X X
V
1
D
J
C
N
SECTION X−X
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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5
MPSW51/D
Analog electronics
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