IDT7281L15JI datasheet, PDF - EEWORLD Datasheet

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IDT7281L15JI: DescriptionFIFO, 512X9, 15ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32; Categorystorage storage; File Size144KB，14 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT7281L15JI Overview

FIFO, 512X9, 15ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32

IDT7281L15JI Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFJ
package instruction	QCCJ,
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	15 ns
JESD-30 code	R-PQCC-J32
JESD-609 code	e0
length	13.97 mm
memory density	4608 bit
memory width	9
Humidity sensitivity level	1
Number of functions	1
Number of terminals	32
word count	512 words
character code	512
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512X9
Exportable	NO
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	3.55 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	11.43 mm

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CMOS ASYNCHRONOUS FIFO

256 x 9, 512 x 9 and 1,024 x 9

IDT7200L

IDT7201LA

IDT7202LA

FEATURES:

•

DESCRIPTION:

The IDT7200/7201/7202 are dual-port memories that load and empty data

on a first-in/first-out basis. The devices use Full and Empty flags to prevent data

overflow and underflow and expansion logic to allow for unlimited expansion

capability in both word size and depth.

The reads and writes are internally sequential through the use of ring

pointers, with no address information required to load and unload data. Data

is toggled in and out of the devices through the use of the Write (W) and Read

(R) pins.

The devices utilize a 9-bit wide data array to allow for control and parity bits

at the user’s option. This feature is especially useful in data communications

applications where it is necessary to use a parity bit for transmission/reception

error checking. It also features a Retransmit (RT) capability that allows for reset

of the read pointer to its initial position when

is pulsed LOW to allow for

retransmission from the beginning of data. A Half-Full Flag is available in the

single device mode and width expansion modes.

These FIFOs are fabricated using IDT’s high-speed CMOS technology.

They are designed for those applications requiring asynchronous and

simultaneous read/writes in multiprocessing and rate buffer applications.

Military grade product is manufactured in compliance with the latest revision of

MIL-STD-883, Class B.

•

First-In/First-Out dual-port memory

256 x 9 organization (IDT7200)

512 x 9 organization (IDT7201)

1,024 x 9 organization (IDT7202)

Low power consumption

— Active: 440mW (max.)

—Power-down: 28mW (max.)

Ultra high speed—12ns access time

Asynchronous and simultaneous read and write

Fully expandable by both word depth and/or bit width

Pin and functionally compatible with 720X family

Status Flags: Empty, Half-Full, Full

Auto-retransmit capability

High-performance CEMOS™ technology

Military product compliant to MIL-STD-883, Class B

Standard Military Drawing #5962-87531, 5962-89666, 5962-89863

and 5962-89536 are listed on this function

Dual versions available in the TSSOP package. For more informa-

tion, see IDT7280/7281/7282 data sheet

IDT7280 = 2 x IDT7200

IDT7281 = 2 x IDT7201

IDT7282 = 2 x IDT7202

Industrial temperature range (–40

C to +85

C) is available

(plastic packages only)

FUNCTIONAL BLOCK DIAGRAM

DATA INPUTS

-D

)

WRITE

CONTROL

WRITE

POINTER

RAM

ARRAY

256 x 9

512 x 9

1,024 x 9

READ

POINTER

READ

CONTROL

THREE-

STATE

BUFFERS

DATA OUTPUTS

-Q

)

RESET

LOGIC

FL/RT

FLAG

LOGIC

EXPANSION

LOGIC

IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.

XO/HF

2679 drw 01

COMMERCIAL, INDUSTRIAL AND MILITARY TEMPERATURE RANGES



2002

SEPTEMBER 2002

DSC-2679/10

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