EEWORLDEEWORLDEEWORLD

Part Number

Search

MT4HTF3264AIY-667XX

Description
DDR DRAM Module, 32MX64, 0.45ns, CMOS, LEAD FREE, MO-237, UDIMM-240
Categorystorage    storage   
File Size363KB,19 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Environmental Compliance  
Download Datasheet Parametric View All

MT4HTF3264AIY-667XX Overview

DDR DRAM Module, 32MX64, 0.45ns, CMOS, LEAD FREE, MO-237, UDIMM-240

MT4HTF3264AIY-667XX Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerMicron Technology
Parts packaging codeDIMM
package instructionDIMM,
Contacts240
Reach Compliance Codecompliant
ECCN codeEAR99
access modeSINGLE BANK PAGE BURST
Maximum access time0.45 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-XDMA-N240
JESD-609 codee4
length133.35 mm
memory density2147483648 bit
Memory IC TypeDDR DRAM MODULE
memory width64
Number of functions1
Number of ports1
Number of terminals240
word count33554432 words
character code32000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize32MX64
Package body materialUNSPECIFIED
encapsulated codeDIMM
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height30.5 mm
self refreshYES
Maximum supply voltage (Vsup)1.9 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceGold (Au)
Terminal formNO LEAD
Terminal locationDUAL
Maximum time at peak reflow temperature30
128MB, 256MB, 512MB (x64, SR) 240-Pin DDR2 SDRAM UDIMM
Features
DDR2 SDRAM UDIMM
MT4HTF1664AY – 128MB
MT4HTF3264AY – 256MB
MT4HTF6464AY – 512MB
Features
240-pin, unbuffered dual in-line memory module
(UDIMM)
Fast data transfer rates: PC2-3200, PC2-4200,
PC2-5300, or PC2-6400
128MB (16 Meg x 64), 256MB (32 Meg x 64),
512MB (64 Meg x 64)
V
DD
= V
DDQ
= 1.8V
V
DDSPD
= 1.7–3.6V
JEDEC-standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
4n-bit prefetch architecture
Multiple internal device banks for concurrent
operation
Programmable CAS latency (CL)
Posted CAS additive latency (AL)
WRITE latency = READ latency - 1
t
CK
Programmable burst lengths (BL): 4 or 8
Adjustable data-output drive strength
64ms, 8192-cycle refresh
On-die termination (ODT)
Serial presence detect (SPD) with EEPROM
Gold edge contacts
Single rank
Table 1: Key Timing Parameters
Speed
Grade
-80E
-800
-667
-53E
-40E
Industry
Nomenclature
PC2-6400
PC2-6400
PC2-5300
PC2-4200
PC2-3200
Data Rate (MT/s)
CL = 6
800
800
CL = 5
800
667
667
CL = 4
533
533
553
553
400
CL = 3
400
400
400
400
400
t
RCD
t
RP
t
RC
Figure 1: 240-Pin UDIMM (MO-237 R/C C)
Module height 30.0mm (1.18in)
Options
Operating temperature
Commercial (0°C
T
A
+70°C)
Industrial (–40°C
T
A
+85°C)
1
Package
240-pin DIMM (lead-free)
Frequency/CL
2
2.5ns @ CL = 5 (DDR2-800)
4
2.5ns @ CL = 6 (DDR2-800)
4
3.0ns @ CL = 5 (DDR2-667)
3.75ns @ CL = 4 (DDR2-533)
3
5.0ns @ CL = 3 (DDR2-400)
3
Notes:
Marking
None
I
Y
-80E
-800
-667
-53E
-40E
1. Contact Micron for industrial temperature
module offerings.
2. CL = CAS (READ) latency.
3. Contact Micron for product availability.
4. Not available in 128MB and 256MB.
(ns)
12.5
15
15
15
15
(ns)
12.5
15
15
15
15
(ns)
55
55
55
55
55
PDF: 09005aef80ed6fda
htf4c16_32_64x64ay – Rev. H 3/10 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2003 Micron Technology, Inc. All rights reserved.
LED screen ring money counter
In order to ensure the accuracy of the amount, when counting banknotes, bank staff often put the sorted banknotes into the money counting machine and let the machine count them 2 to 3 times. In additi...
探路者 LED Zone
Digital Oscilloscope (I)
[i=s]This post was last edited by paulhyde on 2014-9-15 09:24[/i] [align=center][align=center] [size=12pt][/size][/align][/align]...
dtcxn Electronics Design Contest
Does anyone have experience developing for arm in ccs5.2? Please help!
Hello everyone, I am developing arm code in ccs5.2 under XP system. I have just started. The kernel I use is arm (Cortex-A8), but I found that some basic instructions are not supported (such as ldr). ...
至高无上 ARM Technology
How to remove this warning
After I compiled, a warning like this appeared when linking. I don't know where it was caused by improper handling. I hope you can take a look.Warning[w29]: Parts of segment DATA16_N are initialized (...
kangjianbo Microcontroller MCU
Can you recommend a mini pc?
Requirements: 1. Intel platform can install Linux system, no need to solve driver problems 2. It is best to support multi-gigabit network cards 3. Once confirmed, the quantity is relatively large, and...
wanghongyang Buy&Sell
What is the use of VxWorks' tickAnnounce()?
The documentation says that tickAnnounce() is used to notify the system kernel of "ticks". Ticks are generated by the system kernel. Does it need to be notified manually? What is the meaning of this f...
wolf365 Real-time operating system RTOS

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2224  1100  232  2207  786  45  23  5  16  17 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号