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FT61981-10PC

Description
Standard SRAM, 16KX4, 10ns, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28
Categorystorage    storage   
File Size631KB,14 Pages
ManufacturerForce Technologies Ltd.
Download Datasheet Parametric View All

FT61981-10PC Overview

Standard SRAM, 16KX4, 10ns, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28

FT61981-10PC Parametric

Parameter NameAttribute value
MakerForce Technologies Ltd.
Parts packaging codeDIP
package instructionDIP,
Contacts28
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time10 ns
JESD-30 codeR-PDIP-T28
length34.8615 mm
memory density65536 bit
Memory IC TypeSTANDARD SRAM
memory width4
Number of functions1
Number of terminals28
word count16384 words
character code16000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize16KX4
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height5.334 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
FT61981/FT61981L
FT61982/FT61982L
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25 ns (Commercial)
– 12/15/20/25/35 ns (Industrial)
– 15/20/25/35/45 ns (Military)
Low Power Operation (Commercial/Military)
Output Enable and Dual Chip Enable Functions
5V ± 10% Power Supply
ULTRA HIGH SPEED 16K x 4
CMOS STATIC RAMS
Data Retention with 2.0V Supply, 10 µA Typical
Current (FT61981L/1982L Military)
Separate Inputs and Outputs
FT61981/L
Input Data at Outputs during Write
FT61982/L
Outputs in High Z during Write
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 28-Pin 300 mil DIP, SOJ
– 28-Pin 350 x 550 mil LCC
– 28-Pin CERPACK
DESCRIPTION
The
FT61981/L
and
FT61982/L
are 65,536-bit (16Kx4)
ultra high-speed static RAMs similar to the
FT6198,
but
with separate data I/O pins. The
FT61981/L
feature a
transparent write operation when
OE
is low; the outputs
of the
FT61982/L
are in high impedance during the write
cycle. All devices have low power standby modes. The
RAMs operate from a single 5V ± 10% tolerance power
supply. With battery backup, data integrity is maintained
for supply voltages down to 2.0V. Current drain is
typically 10 µA from 2.0V supply.
Access times as fast as 10 nanoseconds are available,
permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption. For the
FT61982L
and
FT61981L,
power is only 5.5 mW standby
with CMOS input levels.
The
FT61981/L
and
FT61982/L
are available in 28-pin 300
mil DIP and SOJ, 28-pin 350x550 mil LCC and a 28-pin
CERPACK package providing excellent board level den-
sities.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
FT61982
FT61981
DIP (P5, C5, D5-2), SOJ (J5)
CERPACK (F4) SIMILAR
FT61981/
1982
LCC (L5)
REV 1.1
1/14
2008
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