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FDS6912A_NL

Description
Small Signal Field-Effect Transistor, 6A I(D), 30V, 2-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SO-8
CategoryDiscrete semiconductor    The transistor   
File Size117KB,5 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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FDS6912A_NL Overview

Small Signal Field-Effect Transistor, 6A I(D), 30V, 2-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SO-8

FDS6912A_NL Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOT
package instructionSMALL OUTLINE, R-PDSO-G8
Contacts8
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresLOGIC LEVEL COMPATIBLE
ConfigurationSEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage30 V
Maximum drain current (Abs) (ID)6 A
Maximum drain current (ID)6 A
Maximum drain-source on-resistance0.028 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G8
JESD-609 codee3
Number of components2
Number of terminals8
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)2 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON

FDS6912A_NL Preview

FDS6912A
July 2003
FDS6912A
Dual N-Channel Logic Level PowerTrench
®
MOSFET
General Description
These N-Channel Logic Level MOSFETs are produced
using
Fairchild
Semiconductor’s
advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
6 A, 30 V.
R
DS(ON)
= 28 mΩ @ V
GS
= 10 V
R
DS(ON)
= 35 mΩ @ V
GS
= 4.5 V
Fast switching speed
Low gate charge
High performance trench technology for extremely
low R
DS(ON)
High power and current handling capability
D2
D
D2
D
D
D1
D1
D
5
6
7
Q1
4
3
2
Q2
SO-8
Pin 1
SO-8
G2
S
S2
S
S
G1
S1
G
8
1
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
T
A
=25
o
C unless otherwise noted
Parameter
Ratings
30
±
20
(Note 1a)
Units
V
V
A
W
6
20
1.6
1.0
0.9
–55 to +150
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
T
J
, T
STG
Operating and Storage Junction Temperature Range
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDS6912A
Device
FDS6912A
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
©2003
Fairchild Semiconductor Corporation
FDS6912A Rev D(W)
FDS6912A
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSS
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Source Leakage
(Note 2)
Test Conditions
V
GS
= 0 V,
I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
DS
= 24 V, V
GS
= 0 V
V
DS
= 24 V, V
GS
= 0 V, T
J
= 55°C
V
GS
=
±20
V, V
DS
= 0 V
V
DS
= V
GS
,
I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
GS
= 10 V, I
D
= 6 A
V
GS
= 4.5 V, I
D
= 5 A
V
GS
= 10 V, I
D
= 6 A,T
J
= 125°C
V
GS
= 10 V, V
DS
= 5 V
V
DS
= 10 V,
I
D
= 6 A
Min
30
Typ
Max Units
V
Off Characteristics
25
1
10
±100
mV/°C
µA
nA
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
1
1.9
–4.5
19
24
27
3
V
mV/°C
28
35
44
mΩ
I
D(on)
g
FS
20
25
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
(Note 2)
V
DS
= 15 V,
f = 1.0 MHz
V
GS
= 0 V,
575
145
65
2.1
pF
pF
pF
V
GS
= 15 mV, f = 1.0 MHz
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= 15 V,
V
GS
= 10 V,
I
D
= 1 A,
R
GEN
= 6
8
5
23
3
16
10
37
6
8.1
ns
ns
ns
ns
nC
nC
nC
V
DS
= 15 V,
V
GS
= 5 V
I
D
= 6 A,
5.8
1.7
2.1
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
t
rr
Q
rr
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
V
GS
= 0 V,
I
F
= 6 A,
I
S
= 1.3 A
(Note 2)
1.3
0.75
20
10
1.2
A
V
nS
nC
d
iF
/d
t
= 100 A/µs
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 78°C/W when
2
mounted on a 0.5in
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
in
2
pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum mounting pad.
Scale 1 : 1 on letter size paper
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6912A Rev D(W)
FDS6912A
Typical Characteristics
20
2.2
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 10.0V
4.0V
3.5V
16
I
D
, DRAIN CURRENT (A)
6.0V
12
4.5V
1.8
V
GS
= 3.5V
1.4
4.0
4.5V
5.0
6.0V
10.0V
8
3.0V
4
1
0
0
0.5
1
1.5
V
DS
, DRAIN-SOURCE VOLTAGE (V)
2
0.6
0
4
8
12
I
D
, DRAIN CURRENT (A)
16
20
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
R
DS(ON)
, ON-RESISTANCE (OHM)
0.08
I
D
= 6A
V
GS
= 10.0V
1.4
I
D
= 3A
0.07
0.06
0.05
T
A
= 125
o
C
0.04
0.03
T
A
= 25
o
C
0.02
0.01
1.2
1
0.8
0.6
-50
-25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (
o
C)
125
150
2
4
6
8
V
GS
, GATE TO SOURCE VOLTAGE (V)
10
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
20
100
I
S
, REVERSE DRAIN CURRENT (A)
V
DS
= 5V
V
GS
= 0V
10
T
A
= 125
o
C
16
I
D
, DRAIN CURRENT (A)
1
12
T
A
= 125
o
C
-55
o
C
0.1
25
o
C
8
25
o
C
4
0.01
-55
o
C
0.001
0
1.5
2
2.5
3
3.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
4
0.0001
0
0.2
0.4
0.6
0.8
1
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6912A Rev D(W)
FDS6912A
Typical Characteristics
10
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 6A
8
20V
6
15V
4
CAPACITANCE (pF)
800
f = 1MHz
V
GS
= 0 V
V
DS
= 10V
600
C
iss
400
C
oss
200
2
C
rss
0
0
2
4
6
8
Q
g
, GATE CHARGE (nC)
10
12
0
0
5
10
15
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
20
Figure 7. Gate Charge Characteristics.
100
P(pk), PEAK TRANSIENT POWER (W)
50
Figure 8. Capacitance Characteristics.
R
DS(ON)
LIMIT
I
D
, DRAIN CURRENT (A)
10
100ms
1s
1
DC
V
GS
= 10V
SINGLE PULSE
R
θJA
= 135
o
C/W
T
A
= 25 C
0.01
0.1
1
10
V
DS
, DRAIN-SOURCE VOLTAGE (V)
o
100µs
1ms
10ms
40
SINGLE PULSE
R
θJA
= 135°C/W
T
A
= 25°C
30
10s
20
0.1
10
100
0
0.001
0.01
0.1
1
t
1
, TIME (sec)
10
100
1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
R
θJA
(t) = r(t) * R
θJA
R
θJA
= 135°C/W
P(pk)
t
1
t
2
SINGLE PULSE
0.01
T
J
- T
A
= P * R
θJA
(t)
Duty Cycle, D = t
1
/ t
2
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6912A Rev D(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
FACT Quiet Series™
ActiveArray™
FAST
Bottomless™
FASTr™
CoolFET™
FRFET™
CROSSVOLT™
GlobalOptoisolator™
DOME™
GTO™
EcoSPARK™ HiSeC™
E
2
CMOS
TM
I
2
C™
EnSigna
TM
ImpliedDisconnect™
FACT™
ISOPLANAR™
Across the board. Around the world.™
The Power Franchise™
Programmable Active Droop™
DISCLAIMER
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
OCX™
OCXPro™
OPTOLOGIC
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
SILENT SWITCHER
SMART START™
SPM™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic
TINYOPTO™
TruTranslation™
UHC™
UltraFET
VCX™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or
In Design
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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