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K4F170811D-BC60

Description
Fast Page DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28
Categorystorage    storage   
File Size226KB,20 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

K4F170811D-BC60 Overview

Fast Page DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28

K4F170811D-BC60 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeSOJ
package instructionSOJ, SOJ28,.34
Contacts28
Reach Compliance Codecompliant
ECCN codeEAR99
access modeFAST PAGE
Maximum access time60 ns
Other featuresRAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O typeCOMMON
JESD-30 codeR-PDSO-J28
JESD-609 codee0
length18.42 mm
memory density16777216 bit
Memory IC TypeFAST PAGE DRAM
memory width8
Number of functions1
Number of ports1
Number of terminals28
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize2MX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ28,.34
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
refresh cycle4096
Maximum seat height3.76 mm
self refreshNO
Maximum standby current0.001 A
Maximum slew rate0.08 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
K4F170811D, K4F160811D
K4F170812D, K4F160812D
CMOS DRAM
2M x 8Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 2,097,152 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells
within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-50 or -60), power con-
sumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-
before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version.
This 2Mx8 Fast Page Mode DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low power
consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
FEATURES
• Part Identification
- K4F170811D-B(F) (5V, 4K Ref.)
- K4F160811D-B(F) (5V, 2K Ref.)
- K4F170812D-B(F) (3.3V, 4K Ref.)
- K4F160812D-B(F) (3.3V, 2K Ref.)
• Fast Page Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
Unit : mW
• Available in Plastic SOJ and TSOP(II) packages
• Single +5V±10% power supply (5V product)
2K
605
550
• Single +3.3V±0.3V power supply (3.3V product)
Active Power Dissipation
3.3V
4K
-50
-60
324
288
2K
396
360
4K
495
440
5V
Speed
FUNCTIONAL BLOCK DIAGRAM
Refresh Cycles
Part
NO.
K4F170811D
K4F170812D
K4F160811D
K4F160812D
V
CC
5V
3.3V
5V
3.3V
2K
32ms
Refresh Control
Refresh Counter
Memory Array
2,097,152 x 8
Cells
Refresh Refresh period
cycle
Normal
L-ver
4K
64ms
128ms
RAS
CAS
W
Control
Clocks
VBB Generator
Vcc
Vss
Data in
Refresh Timer
Row Decoder
Sense Amps & I/O
Buffer
Performance Range
Speed
-50
-60
DQ0
to
DQ7
t
RAC
50ns
60ns
t
CAC
13ns
15ns
t
RC
90ns
110ns
t
PC
35ns
40ns
Remark
5V/3.3V
5V/3.3V
A0-A11
(A0 - A10)
*1
A0 - A8
(A0 - A9)
*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Data out
Buffer
OE
Note)
*1
: 2K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
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