M24512-DRMN3TG/K datasheet, PDF

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M24512-DRMN3TG/K: DescriptionEEPROM 5V; Categorystorage storage; File Size481KB，43 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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M24512-DRMN3TG/K Overview

EEPROM 5V

M24512-DRMN3TG/K Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	STMicroelectronics
package instruction	SOP-8
Reach Compliance Code	compliant
Maximum clock frequency (fCLK)	1 MHz
Data retention time - minimum	40
Durability	1000000 Write/Erase Cycles
I2C control byte	1010DDDR
JESD-30 code	R-PDSO-G8
length	4.9 mm
memory density	524288 bit
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	8
word count	65536 words
character code	64000
Operating mode	SYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
organize	64KX8
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
power supply	2/5 V
Programming voltage	5 V
Certification status	Not Qualified
Filter level	AEC-Q100
Maximum seat height	1.75 mm
Serial bus type	I2C
Maximum standby current	0.000001 A
Maximum slew rate	0.005 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.8 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	3.9 mm
Maximum write cycle time (tWC)	4 ms
write protect	HARDWARE

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M24512-R

M24512-W M24512-DF

512 Kbit serial I²C bus EEPROM

with three Chip Enable lines

Datasheet

−

production data

Features

■

Compatible with all I²C bus modes:

– 1 MHz Fast-mode Plus

– 400 kHz Fast mode

– 100 kHz Standard mode

Memory array:

– 512 Kb (64 Kbytes) of EEPROM

– Page size: 128 bytes

M24512-DF: additional Write lockable Page

(Identification page)

Noise suppression

– Schmitt trigger inputs

– Input noise filter

Write

– Byte Write within 5 ms

– Page Write within 5 ms

Random and Sequential Read modes

Write protect of the whole memory array

Single supply voltage:

– 1.7 V to 5.5 V

Enhanced ESD/Latch-Up protection

More than 1 million Write cycles

More than 40-year data retention

Packages

– ECOPACK2® (RoHS compliant and

Halogen-free)

UFDFPN8

(MB, MC)

■

SO8 (MW)

208 mils width

■

SO8 (MN)

150 mils width

■

TSSOP8 (DW)

WLCSP (CS)

April 2012

This is information on a product in full production.

Doc ID 16459 Rev 24

1/43

www.st.com

Contents

M24512-R M24512-W M24512-DF

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1

2.2

2.3

2.4

2.5

2.6

Serial Clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Serial Data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Chip Enable (E0, E1, E2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Write Control (WC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.6.1

2.6.2

2.6.3

2.6.4

Operating supply voltage V

CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.11

3.12

3.13

3.14

3.15

3.16

3.17

Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Acknowledge bit (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Addressing the memory array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Addressing the Identification page (M24512-DF only) . . . . . . . . . . . . . . . 14

Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Page Write (memory array) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write Identification Page (M24512-DF only) . . . . . . . . . . . . . . . . . . . . . . 17

Lock Identification Page (M24512-DF only) . . . . . . . . . . . . . . . . . . . . . . . 17

ECC (error correction code) and write cycling . . . . . . . . . . . . . . . . . . . . . 17

Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 19

Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Random Address Read (in memory array) . . . . . . . . . . . . . . . . . . . . . . . . 21

Current Address Read (in memory array) . . . . . . . . . . . . . . . . . . . . . . . . 21

Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2/43

Doc ID 16459 Rev 24

List of tables

M24512-R M24512-W M24512-DF

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Device select code (for memory array) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Device select code to access the Identification page (M24512-DF only) . . . . . . . . . . . . . . 11

Most significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Least significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Operating conditions (voltage range W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Operating conditions (voltage range R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Operating conditions (voltage range F) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

AC test measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Input parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

DC characteristics (voltage range W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

DC characteristics (voltage range R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DC characteristics (voltage range F) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

400 kHz AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

1 MHz AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

SO8W – 8-lead plastic small outline, 208 mils body width, package data . . . . . . . . . . . . . 31

SO8N – 8-lead plastic small outline, 150 mils body width, package mechanical data . . . . 32

TSSOP8 – 8-lead thin shrink small outline, package mechanical data. . . . . . . . . . . . . . . . 33

UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead

2 x 3 mm, data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

WLCSP (KA die) 8-bump wafer-level chip scale package mechanical data. . . . . . . . . . . . 35

WLCSP (KB die) 8-bump wafer-level chip scale package mechan. data . . . . . . . . . . . . . . 36

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4/43

Doc ID 16459 Rev 24

M24512-R M24512-W M24512-DF

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

SO, UFDFPN and TSSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP connections for “KA” die (top view, marking side, with balls on the underside . . . . 7

WLCSP connections for “KB” die (top view, marking side, with balls on the underside) . . . 7

Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

C Fast mode (f

= 400 kHz): maximum R

bus

value versus

bus parasitic capacitance (C

bus

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

I C Fast mode Plus (f

= 1 MHz): maximum R

bus

value versus

bus parasitic capacitance (C

bus

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

I C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Write mode sequences with WC = 1 (data write inhibited) . . . . . . . . . . . . . . . . . . . . . . . . . 15

Write mode sequences with WC = 0 (data write enabled) . . . . . . . . . . . . . . . . . . . . . . . . . 18

Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Read mode sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

AC test measurement I/O waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

AC timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

SO8W – 8-lead plastic small outline, 208 mils body width, package outline . . . . . . . . . . . 31

SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 32

TSSOP8 – 8-lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 33

UFDFPN8 (MLP8) - 8-lead ultra thin fine pitch dual flat no lead, package

outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

WLCSP (KA die) - 8-bump wafer-level chip scale package outline . . . . . . . . . . . . . . . . . . 35

WLCSP (KB die) 8-bump wafer-level chip scale package outline . . . . . . . . . . . . . . . . . . . 36

Doc ID 16459 Rev 24

5/43

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