UNISONIC TECHNOLOGIES CO., LTD
UC3842B/3843B
HIGH PERFORMANCE
CURRENT MODE
CONTROLLERS
DESCRIPTION
The UTC
UC3842B/3843B
are specifically designed for off-line
and dc-to-dc converter applications offering the designer a
cost-effective solution with minimal external components.
The
UC3842B
has UVLO thresholds 16V (on) and 10V(off),
ideally suited for off-line converters. The
UC3843B
is tailored for
lower voltage applications having UVLO thresholds of 8.4V(on)
and 7.6V(off).
LINEAR INTEGRATED CIRCUIT
FEATURES
* Trimmed oscillator for precise frequency control
* Oscillator frequency guaranteed at 250kHz
* Current mode operation to 500kHz
* Automatic feed forward compensation
* Latching PWM for cycle-by-cycle current limiting
* Internally trimmed reference with undervoltage lockout
* High current totem pole output
* Undervoltage lockout with hysteresis
* Low startup and operating current
ORDERING INFORMATION
Ordering Number
Lead Free
UC3842BL-D08-T
UC3842BL-S08-R
UC3842BL-S08-T
UC3843BL-D08-T
UC3843BL-S08-R
UC3843BL-S08-T
Halogen Free
UC3842BP-D08-T
UC3842BP-S08-R
UC3842BP-S08-T
UC3843BP-D08-T
UC3843BP-S08-R
UC3843BP-S08-T
Package
DIP-8
SOP-8
SOP-8
DIP-8
SOP-8
SOP-8
Packing
Tube
Tape Reel
Tube
Tube
Tape Reel
Tube
www.unisonic.com.tw
Copyright © 2012 Unisonic Technologies Co., Ltd
1 of 10
QW-R103-012.E
UC3842B/3843B
PIN CONFIGURATION
LINEAR INTEGRATED CIRCUIT
COMP
1
8
V
REF
V
FB
2
7
V
CC
CS
3
6
OUTPUT
R
T
C
T
4
5
GND
PIN DESCRIPTIONS
PIN NO.
1
2
3
4
5
6
7
8
PIN NAME
COMP
V
FB
CS
R
T
C
T
GND
OUTPUT
V
CC
V
REF
I/O
O
I
I
I
O
O
DESCRIPTION
Error amp output to provide loop compensation maintaing V
FB
at 2.5V
Error amp inverting input, The non-inverting input of error amp is 2.5V band
gap reference
Current sense input to PWM control gate drive of output
To set oscillator frequency and maximum output duty cycle
Power ground
To direct drive power MOSFET
Power supply
5V regulated output provides charging current for C
T
through R
T
BLOCK DIAGRAM
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QW-R103-012.E
UC3842B/3843B
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS
(T
A
=25℃, unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Total Power Supply and Zener Current
(I
CC
+ I
Z
)
30
mA
Output Current, Source or Sink (Note 2)
I
O
1.0
A
Output Energy (capacitive load per cycle)
W
5.0
μJ
Current Sense and Voltage Feedback Inputs
V
IN
-0.3 ~ +5.5
V
Error Amp. Output Sink Current
I
O(SINK)
10
mA
DIP-8
1250
mW
Power Dissipation
P
D
SOP-8
800
mW
℃
Operating Junction Temperature
T
J
+150
℃
Operating Temperature
T
OPR
0 ~ +70
℃
Storage Temperature
T
STG
-65 ~ +150
Note: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Maximum Package power dissipation limits must be observed.
THERMAL DATA
PARAMETER
Junction to Ambient
DIP-8
SOP-8
SYMBOL
θ
JA
RATINGS
100
156
UNIT
°C/W
°C/W
ELECTRICAL CHARACTERISTICS
(0℃
≤T
A
≤70℃,
V
CC
=15V (Note 1), R
T
=10k, C
T
=3.3nF, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
REFERENCE SECTION
I
O
=1.0mA, T
J
=25℃
Output Voltage
V
REF
Line Regulation
ΔV
LINE
V
CC
=12V ~ 25V
Load Regulation
ΔV
LOAD
I
O
=1.0mA ~ 20mA
Temperature Stability
T
S
Total Output Variation
V
REF
Line, Load, Temperature
F=10kHz ~ 10Hz, T
J
=25℃
Output Noise Voltage
e
N
T
A
=125℃,1000Hrs
Long Term Stability
S
Output Short Circuit Current
I
SC
OSCILLATOR SECTION
T
J
=25℃
T
A
=0℃ ~ 70℃
Frequency
F
T
J
=25℃ (R
T
=6.2k,C
T
=1.0nF)
Frequency Change with Voltage
Δf
OSC
/ΔV 12
≤
V
CC
≤25V
Frequency Change with
Δf
OSC
/ΔT 0℃
≤T
A
≤70℃
Temperature
Oscillator Voltage Swing
V
OSC
(Peak to Peak)
T
J
=25℃
Discharge Current
I
DISCHG
0℃
≤T
A
≤70℃
MIN
4.9
TYP
5.0
2.0
3.0
0.2
50
5
-85
52
250
0.2
0.5
1.6
7.8
7.6
8.3
8.3
8.8
8.8
MAX
5.1
20
25
5.18
UNIT
V
mV
mV
mV/℃
V
uV
mV
mA
4.82
-30
49
48
225
-180
55
56
275
1.0
kHz
%
%
V
mA
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QW-R103-012.E
UC3842B/3843B
ELECTRICAL CHARACTERISTICS (Cont.)
PARAMETER
ERROR AMPLIFIER SECTION
Voltage Feedback Input
Input Bias Current
Open Loop Voltage Gain
Unity Gain Bandwidth
Power Supply Rejection Ratio
Output Sink Current
Output Source Current
Output Voltage Swing High State
Output Voltage Swing Low State
CURRENT SENSE SECTION
Current Sense Input Voltage Gain
Maximum Current Sense Input
Threshold
Power Supply Rejection Ratio
Input Bias Current
Propagation Delay
OUTPUT SECTION
Output Low Voltage
Output High Voltage
SYMBOL
V
FB
I
I(BIAS)
G
VO
GB
W
PSRR
I
SINK
I
SOURCE
V
OH
V
OL
G
V
V
I(THR)
PSRR
I
I(BIAS)
t
D(IN/OUT)
V
OL
V
OH
LINEAR INTEGRATED CIRCUIT
TEST CONDITIONS
Vo=2.5V
V
FB
=5.0V
2
≤V
O
≤4V
T
J
=25℃
I2V≤V
CC
≤25V
V
O
=1.1V,V
FB
=2.7V
V
O
=5.0V,V
FB
=2.3V
V
FB
=2.3V, R
L
=15k to GND
V
FB
=2.7V, R
L
=15k to V
REF
(Note 2, 3)
(Note 2)
12≤Vcc≤25V (Note 2)
Current Sense Input to Output
I
SINK
=20mA
I
SINK
=200mA
I
SOURCE
=20mA
I
SOURCE
=200mA
V
CC
=6.0V,I
SINK
=1.0mA
T
J
=25℃,C
L
=1nF
T
J
=25℃,C
L
=1nF
UC3842B
UC3843B
UC3842B
UC3843B
MIN
2.42
65
0.7
60
2.0
-0.5
5.0
TYP
2.50
-0.1
90
1.0
70
12
-1.0
6.2
0.8
3.0
1.0
70
-2
150
0.1
1.6
13.5
13.4
0.1
50
50
MAX
2.58
-2.0
UNIT
V
μA
dB
MHz
dB
mA
mA
V
V
V/V
V
dB
μA
ns
V
V
V
V
V
ns
ns
V
V
V
V
%
%
mA
mA
V
1.1
3.15
1.1
-10
300
0.4
2.2
2.85
0.9
13
12
Output Voltage with UVLO
V
OL (UVLO)
Activated
Output Voltage Rise Time
t
R
Output Voltage Fall Time
t
F
UNDER-VOLTAGE LOCKOUT SECTION
Startup Threshold
Min. Operating Voltage After
Turn-on(V
CC
)
PWM SECTION
MAX
Duty Cycle
MIN
Total DEVICE
Power Startup Supply Current
V
THR
V
CC(MIN)
1.1
150
150
17.5
9
11.5
8.2
14.5
7.8
8.5
7.0
94
16
8.4
10
7.6
96
DC
0
0.3
30
12
36
0.5
17
V
CC
=6.5V for
UC3843B
V
CC
=14V for
UC3842B
Power Operating Supply Current
I
CC
+I
C
Note 1
Power Supply Zener Voltage
V
Z
I
CC
=25mA
Note: 1. Adject V
CC
above the Startup threshold before setting to 15V.
2. This parameter is measured at the latch trip point with V
FB
=0V.
ΔV
Output Compensation
3. Comparator gain is defined as : G
V
ΔV
Current Sense Input
I
CC
+I
C
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4 of 10
QW-R103-012.E
UC3842B/3843B
TYPICAL APPLICATION CIRCUIT
LINEAR INTEGRATED CIRCUIT
Open Loop Test Circuit
All of the parameters are not all tested in production, although been guaranteed. The timing and bypass capacitors
must be connected to Pin 5 in a single point ground very closely. To sample the oscillator waveform, the transistor
and 5kΩ potentiometer are used, and also can apply an adjustable ramp to I
SENSE
Pin.
2N
2222
UTC
UC3842B/3843B
1 COMP
2 V
FB
3 I
SENSE
5K
C
T
4 R
T
/C
T
V
REF
8
V
C
7
OUTPUT
6
V
REF
R
T
100K
4.7K
E/A
ADJUST
4.7K
1K
I
SENSE
ADJUST
A
V1
OUTPUT
0.1
GND 5
0.1
1K/1W
Under Voltage Lockout
Under-Voltage Lock-Out: the output driver is biased to a high impedance state. To prevent activating the power
switch with output leakage current, Pin 6 should be shunted to ground with a bleeder resistor.
Error Amp Configuration
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5 of 10
QW-R103-012.E
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