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Datasheet> All Categories > Analog mixed-signal IC> Drivers and interfaces> ADM3485EAR-REEL
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ADM3485EAR-REEL

Description
LINE TRANSCEIVER, PDSO8, MS-012AA, SOIC-8
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size1MB，17 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Download Datasheet Parametric Compare View All

ADM3485EAR-REEL Overview

LINE TRANSCEIVER, PDSO8, MS-012AA, SOIC-8

ADM3485EAR-REEL Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
MakerRochester Electronics
Parts packaging codeSOIC
package instructionMS-012AA, SOIC-8
Contacts8
Reach Compliance Codeunknown
Differential outputYES
Number of drives1
Input propertiesDIFFERENTIAL SCHMITT TRIGGER
Interface integrated circuit typeLINE TRANSCEIVER
Interface standardsEIA-422; EIA-485
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length4.9 mm
Humidity sensitivity level1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)240
Maximum receive delay90 ns
Number of receiver bits1
Maximum seat height1.75 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyBICMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
maximum transmission delay35 ns
width3.9 mm

ADM3485EAR-REEL Preview

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±15 kV ESD-Protected, 3.3 V,12 Mbps,
EIA RS-485/RS-422 Transceiver
ADM3485E
FEATURES
TIA/EIA RS-485/RS-422 compliant
±15 kV ESD protection on RS-485 input/output pins
12 Mbps data rate
Half-duplex transceiver
Up to 32 nodes on the bus
Receiver open-circuit, fail-safe design
Low power shutdown current
Outputs high-Z when disabled or powered off
Common-mode input range: −7 V to +12 V
Thermal shutdown and short-circuit protection
Industry-standard 75176 pinout
8-lead narrow SOIC package
FUNCTIONAL BLOCK DIAGRAM
ADM3485E
RO
R
RE
B
DE
A
DI
D
APPLICATIONS
Power/energy metering
Telecommunications
EMI-sensitive systems
Industrial control
Local area networks
03338-001
Figure 1.
GENERAL DESCRIPTION
The ADM3485E is a 3.3 V, low power data transceiver with
±15 kV ESD protection, suitable for half-duplex communi-
cation on multipoint bus transmission lines. The ADM3485E
is designed for balanced data transmission and complies with
TIA/EIA standards RS­485 and RS-422. The ADM3485E is a
half-duplex transceiver that shares differential lines and has
separate enable inputs for the driver and the receiver.
The devices have a 12 kΩ receiver input impedance, which
allows up to 32 transceivers on a bus. Because only one driver
should be enabled at any time, the output of a disabled or
powered-down driver is tristated to avoid overloading the bus.
The receiver has a fail-safe feature that ensures a logic high
output when the inputs are floating. Excessive power dissipation
caused by bus contention or by output shorting is prevented
with a thermal shutdown circuit.
The part is fully specified over the industrial temperature range
and is available in an 8-lead narrow SOIC package.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2000-2010 Analog Devices, Inc. All rights reserved.
ADM3485E
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Specifications....................................................................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Pin Configuration and Pin Function Descriptions ...................... 6
Test Circuits and Switching Characteristics...................................7
Typical Performance Characteristics ..............................................9
Standards and Testing .................................................................... 11
ESD Testing ................................................................................. 11
Applications Information .............................................................. 12
Differential Data Transmission ................................................ 12
Cable and Data Rate ................................................................... 12
Receiver Open-Circuit Fail-Safe............................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
8/10—Rev. C to Rev. D
Changes to Table 1, Driver, Logic Inputs ...................................... 3
12/06—Rev. B to Rev. C
Updated Format .................................................................. Universal
Removed PDIP Model ....................................................... Universal
Changes to Features, Applications, and General Description .... 1
Changes to Specifications ................................................................ 3
Changes to Timing Specifications .................................................. 4
Changes to Absolute Maximum Ratings ....................................... 5
Reorganized Test Circuits and Switching
Characteristics Section..................................................................... 7
Replaced Figure 3 to Figure 11 ....................................................... 7
Deleted Figure 12 to Figure 14 ........................................................ 8
Changes to Figure 15 to Figure 20 .................................................. 9
Changes to Figure 21 and Figure 22 ............................................. 10
Changes to Table 9 .......................................................................... 11
Deleted Figure 24 ............................................................................ 11
Removed Fast Transient Burst Immunity
(IEC1000-4-4) Section ................................................................... 12
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 13
10/04—Rev. A to Rev. B
Updated Format .................................................................. Universal
Changes to Power-Supply Current, Table 1 .................................. 3
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
5/00—Rev. 0 to Rev. A
Rev. D | Page 2 of 16
ADM3485E
SPECIFICATIONS
V
CC
= +3.3 V ± 0.3 V. All specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter
DRIVER
Differential Outputs
Differential Output Voltage
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
V
OD
2.0
1.5
1.5
0.2
3
0.2
–250
250
∆|V
OD
| for Complementary Output States
1
Common-Mode Output Voltage
∆|V
OC
| for Complementary Output States
1
Short-Circuit Output Current
Logic Inputs
Input Low Voltage
Input High Voltage
Logic Input Current
RECEIVER
Differential Inputs
Differential Input Threshold Voltage
Input Voltage Hysteresis
Input Resistance (A, B)
Input Current (A, B)
RO Logic Output
Output Voltage High
Output Voltage Low
Short-Circuit Output Current
Tristate Output Leakage Current
POWER SUPPLY CURRENT
Voltage Range
Supply Current
∆V
OD
V
OC
∆V
OC
I
OSD
V
V
V
V
V
V
mA
mA
V
V
µA
R
L
= 100 Ω (RS-422) (see Figure 3)
R
L
= 54 Ω (RS-485) (see Figure 3)
R
L
= 60 Ω (RS-485) (see Figure 4)
R
L
= 54 Ω or 100 Ω (see Figure 3)
R
L
= 54 Ω or 100 Ω ( see Figure 3)
R
L
= 54 Ω or 100 Ω (see Figure 3)
V
OUT
= –7 V
V
OUT
= 12 V
DE, DI, RE
DE, DI, RE
DE, DI, RE
V
IL
V
IH
I
IN1
0.8
2.0
±2
V
TH
∆V
TH
R
IN
I
IN2
–0.2
50
12
+0.2
1.0
–0.8
V
mV
kΩ
mA
mA
V
V
mA
µA
V
mA
mA
µA
kV
kV
–7 V < V
CM
< +12 V
V
CM
= 0 V
–7 V < V
CM
< +12 V
DE = 0 V, V
CC
= 0 V or 3.6 V, V
IN
= 12 V
DE = 0 V, V
CC
= 0 V or 3.6 V, V
IN
= –7 V
I
OUT
= –1.5 mA, V
ID
= 200 mV (see Figure 5)
I
OUT
= 2.5 mA, V
ID
= 200 mV (see Figure 5)
0 V < V
RO
< V
CC
V
CC
= 3.6 V, 0 V < V
OUT
< V
CC
V
OH
V
OL
I
OSR
I
OZR
V
CC
I
CC
V
CC
– 0.4 V
±8
0.4
±60
±1
3.6
2.2
1.9
1
3.0
1.1
0.95
Shutdown Current
ESD PROTECTION
A, B Pins
All Pins Except A, B
1
I
SHDN
0.002
±15
±4
No load, DI = 0 V or V
CC
, DE = V
CC
,
RE = 0 V or V
CC
No load, DI = 0 V or V
CC
, DE = 0 V,
RE = 0 V
DE = 0 V, RE = V
CC
, DI = 0 V or V
CC
Human body model
Human body model
Δ|V
OD
| and Δ|V
OC
| are the changes in V
OD
and V
OC
, respectively, when DI input changes state.
Rev. D | Page 3 of 16
ADM3485E
TIMING SPECIFICATIONS
V
CC
= 3.3 V, T
A
= 25°C.
Table 2.
Parameter
DRIVER
Maximum Data Rate
Differential Output Delay
Differential Output Transition Time
Propagation Delay
From Low to High Level
From High to Low Level
|t
PLH
− t
PHL
| Propagation Delay Skew
Enable/Disable Timing
Enable Time to Low Level
Enable Time to High Level
Disable Time from Low Level
Disable Time from High Level
Enable Time from Shutdown to Low Level
Enable Time from Shutdown to High Level
RECEIVER
Propagation Delay
From Low to High Level
From High to Low Level
|t
RPLH
− t
RPHL
| Propagation Delay Skew
Enable/Disable Timing
Enable Time to Low Level
Enable Time to High Level
Disable Time from Low Level
Disable Time from High Level
Enable Time from Shutdown to Low Level
Enable Time from Shutdown to High Level
Time to Shutdown
1
1
Symbol
Min
12
1
3
7
7
Typ
15
22
11
23
23
–1.4
42
42
35
35
650
650
Max
Unit
Test Conditions/Comments
t
DD
t
TD
t
PLH
t
PHL
t
PDS
t
PZL
t
PZH
t
PLZ
t
PHZ
t
PSL
t
PSH
35
25
35
35
±8
90
90
80
80
900
900
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
L
= 60 Ω, C
L1
= C
L2
= 15 pF (see Figure 6)
R
L
= 60 Ω, C
L1
= C
L2
= 15 pF (see Figure 6)
R
L
= 27 Ω (see Figure 7)
R
L
= 27 Ω (see Figure 7)
R
L
= 27 Ω (see Figure 7)
R
L
= 110 Ω (see Figure 9)
R
L
= 110 Ω (see Figure 8)
R
L
= 110 Ω (see Figure 9)
R
L
= 110 Ω (see Figure 8)
R
L
= 110 Ω (see Figure 9)
R
L
= 110 Ω (see Figure 8)
t
RPLH
t
RPHL
t
RPDS
t
RPZL
t
RPZH
t
RPLZ
t
RPHZ
t
RPSL
t
RPSH
t
SHDN
25
25
62
62
6
25
25
25
25
720
720
190
90
90
±10
50
50
45
45
1400
1400
300
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
ID
= 0 V to 3.0 V, C
L
= 15 pF (see Figure 10)
V
ID
= 0 V to 3.0 V, C
L
= 15 pF (see Figure 10)
V
ID
= 0 V to 3.0 V, C
L
= 15 pF (see Figure 10)
C
L
= 15 pF (see Figure 11)
C
L
= 15 pF (see Figure 11)
C
L
= 15 pF (see Figure 11)
C
L
= 15 pF (see Figure 11)
C
L
= 15 pF (see Figure 11)
C
L
= 15 pF (see Figure 11)
80
The transceivers are put into shutdown mode by bringing the RE high and the DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to
enter shutdown. If the parts are in this state for 300 ns or more, the parts are guaranteed to enter shutdown.
Rev. D | Page 4 of 16
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ADM3485EAR-REEL Related Products

ADM3485EAR-REEL ADM3485EARZ ADM3485EAR
Description LINE TRANSCEIVER, PDSO8, MS-012AA, SOIC-8 LINE TRANSCEIVER, PDSO8, ROHS COMPLIANT, MS-012AA, SOIC-8 LINE TRANSCEIVER, PDSO8, MS-012AA, SOIC-8
Is it lead-free? Contains lead Lead free Contains lead
Maker Rochester Electronics Rochester Electronics Rochester Electronics
Parts packaging code SOIC SOIC SOIC
package instruction MS-012AA, SOIC-8 ROHS COMPLIANT, MS-012AA, SOIC-8 MS-012AA, SOIC-8
Contacts 8 8 8
Reach Compliance Code unknown unknown unknown
Differential output YES YES YES
Number of drives 1 1 1
Input properties DIFFERENTIAL SCHMITT TRIGGER DIFFERENTIAL SCHMITT TRIGGER DIFFERENTIAL SCHMITT TRIGGER
Interface integrated circuit type LINE TRANSCEIVER LINE TRANSCEIVER LINE TRANSCEIVER
Interface standards EIA-422; EIA-485 EIA-422; EIA-485 EIA-422; EIA-485
JESD-30 code R-PDSO-G8 R-PDSO-G8 R-PDSO-G8
JESD-609 code e0 e3 e0
length 4.9 mm 4.9 mm 4.9 mm
Humidity sensitivity level 1 1 NOT SPECIFIED
Number of functions 1 1 1
Number of terminals 8 8 8
Maximum operating temperature 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP SOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 240 260 NOT APPLICABLE
Maximum receive delay 90 ns 90 ns 90 ns
Number of receiver bits 1 1 1
Maximum seat height 1.75 mm 1.75 mm 1.75 mm
Maximum supply voltage 3.6 V 3.6 V 3.6 V
Minimum supply voltage 3 V 3 V 3 V
Nominal supply voltage 3.3 V 3.3 V 3.3 V
surface mount YES YES YES
technology BICMOS BICMOS BICMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface TIN LEAD MATTE TIN TIN LEAD
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 40 NOT APPLICABLE
maximum transmission delay 35 ns 35 ns 35 ns
width 3.9 mm 3.9 mm 3.9 mm

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