EEWORLDEEWORLDEEWORLD

Part Number

Search

XO-543CRED6012M288

Description
HCMOS/TTL Output Clock Oscillator, 12.288MHz Nom, HALOGEN FREE AND ROHS COMPLIANT, RESISTANCE WELDED, METAL PACKAGE-14/4
CategoryPassive components    oscillator   
File Size150KB,3 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Environmental Compliance
Download Datasheet Parametric View All

XO-543CRED6012M288 Overview

HCMOS/TTL Output Clock Oscillator, 12.288MHz Nom, HALOGEN FREE AND ROHS COMPLIANT, RESISTANCE WELDED, METAL PACKAGE-14/4

XO-543CRED6012M288 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerVishay
Reach Compliance Codeunknown
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; BULK
maximum descent time8 ns
Frequency Adjustment - MechanicalNO
frequency stability100%
JESD-609 codee2
Manufacturer's serial numberXO-543
Installation featuresTHROUGH HOLE MOUNT
Nominal operating frequency12.288 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeHCMOS/TTL
Output load5 TTL, 30 pF
physical size20.4mm x 12.9mm x 5.08mm
longest rise time8 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountNO
maximum symmetry45/55 %
Terminal surfaceTin/Copper (Sn/Cu)
XO-543
Vishay Dale
Full Size Clock Oscillators TTL/HCMOS Compatible
FEATURES
Size: 14 pin full size
Industry standard
Wide frequency range
Low cost
Tri-state enable/disable
Resistance weld package
3.3 V
Compliant to RoHS Directive 2002/95/EC
Halogen-free according to IEC 61249-2-21 definition
The XO-543 series is with 3.3 V power supply. The metal
package with pin 7 case ground acts as shielding to
minimize EMI radiation.
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
Frequency range
Frequency stability
(1)
Operating temperature range
Storage temperature range
Power supply voltage
Aging (first year)
Supply current
Output symmetry
Rise time
Fall time
Output voltage
Output load
Start-up time
Pin 1, tri-state function
SYMBOL
F
O
T
OPR
T
STG
V
DD
CONDITION
-
all conditions
-
-
-
25 °C ± 3 °C
1.000 MHz to 23.999 MHz
24.000 MHz to 49.999 MHz
50.000 MHz to 69.999 MHz
70.000 MHz to 100.000 MHz
at ½ V
DD
10 % V
DD
to 90 % V
DD
90 % V
DD
to 10 % V
DD
-
-
-
-
-
-
-
VALUE
1.000 MHz to 100.000 MHz
± 25 ppm, ± 50 ppm, ± 100 ppm
0 ºC to 70 ºC
- 40 ºC to + 85 ºC (option)
- 55 ºC to + 125 ºC
3.3 V ± 10 %
± 5 ppm
15 mA max.
20 mA max.
30 mA max.
45 mA max.
40 %/60 % (45 %/55 % option)
8 ns max.
8 ns max.
90 % V
DD
min.
10 % V
DD
max.
1 TTL to 5 TTL
to 50M: 30 pF
to 125M: 15 pF
10 ms max.
pin 1 = H or open (output active at pin 3)
pin 1 = L (high impedance at pin 3)
I
DD
Sym
t
r
t
f
V
OH
V
OL
TTL load
HCMOS load
t
s
Note
(1)
Include: 25 ºC tolerance, operating temperature range, input voltage change, aging, load change, shock and vibration
DIMENSIONS
in inches [millimeters]
CMOS
LOAD
CL
(1)
max.
Note
(1)
Includes Stray and Probe Capacitance
max.
OH
DD
max.
IH
DC
OL
DD
DD
max.
DD
Document Number: 35038
Revision: 08-Mar-11
For technical questions, contact:
frequency@vishay.com
www.vishay.com
25
Analysis of IC Testing Principles
[size=3] [/size][size=4]Chip Testing PrinciplesDiscuss the basic principles of chip testing during chip development and production. This article will discuss how to apply these principles to the testi...
jyl Test/Measurement
CSocket Assertion Error
I use CSocket to transfer files, and an assertion error occurs when receiving: socketcore.cpp, line: 1466. I looked at this file and the assertion is the assert(hEvent!=Null) in the OnSocketDead funct...
applebee Embedded System
Transplanting Qt Input Method on S3C2440
[align=center][b]Author: Fang Shiwen, lecturer of Wuhan Huaqian[/b][/align]Development platform: ubuntu 8.04 Target platform: S3c2440 Development tools: arm cross tool chain version EABI 4.3.3 Qt4 emb...
武汉linux Embedded System
Please recommend a good CDMA module
I'm in urgent need of a good CDMA module. Please recommend it. It's really urgent. If you have time, please give me a thumbs up and recommend it!! This module is mainly used for data transmission and ...
wenwen223 Embedded System
Design Techniques to Reduce FPGA Power Consumption
[b]Control Power Consumption Using These Design Techniques and ISE Functional Analysis Tools[/b] New generations of FPGAs are getting faster, denser, and have more logic resources. So how can you ensu...
songrisi FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 595  1244  1712  2487  1643  12  26  35  51  34 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号