3.3V CMOS
16-BIT REGISTERED
TRANSCEIVER
Integrated Device Technology, Inc.
IDT74FCT163952A/B/C
FEATURES:
• 0.5 MICRON CMOS Technology
•
Typical t
SK
(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP and 15.7 mil pitch TVSOP
• Extended commercial range of -40°C to +85°C
• V
CC
= 3.3V
±0.3V,
Normal Range or
V
CC
= 2.7 to 3.6V, Extended Range
• CMOS power levels (0.4µW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Low Ground Bounce (0.3V typ.)
• Inputs (except I/O) can be driven by 3.3V or 5V
components
DESCRIPTION:
The FCT163952A/B/C 16-bit registered transceivers are
built using advanced dual metal CMOS technology. These
high-speed, low-power devices are organized as two indepen-
dent 8-bit D-type registered transceivers with separate input
and output control for independent control of data flow in either
direction. For example, the A-to-B Enable (x
CEAB
) must be
LOW to enter data from the A port. xCLKAB controls the
clocking function. When xCLKAB toggles from LOW-to-HIGH,
the data present on the A port will be clocked into the register.
x
OEAB
performs the output enable function on the B port.
Data flow from the B port to A port is similar but requires using
x
CEBA
, xCLKBA, and x
OEBA
inputs. Full 16-bit operation is
achieved by tying the control pins of the independent trans-
ceivers together.
The FCT163952A/B/C have series current limiting resis-
tors. These offer low ground bounce, minimal undershoot, and
controlled output fall times–reducing the need for external
series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM
1
CEBA
1
CLKBA
1
OEAB
1
CEAB
1
CLKAB
1
OEBA
C
CE
D
C
CE
D
2
CEBA
2
CLKBA
2
OEAB
2
CEAB
2
CLKAB
2
OEBA
C
CE
D
C
CE
D
1
A
1
1
B
1
2
A
1
2
B
1
TO 7 OTHER CHANNELS
3096 drw 01
TO 7 OTHER CHANNELS
3096 drw 02
The IDT Logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996
Integrated Device Technology, Inc.
AUGUST 1996
8.10
DSC-3096/4
1
IDT74FCT163952/A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATIONS
PIN DESCRIPTION
Pin Names
x
OEAB
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Clock Enable Input (Active LOW)
B-to-A Clock Enable Input (Active LOW)
A-to-B Clock Input
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs
B-to-A Data Inputs or A-to-B 3-State Outputs
3096 tbl 01
1
OEAB
1
CLKAB
1
CEAB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
SO56-1 43
SO56-2
SO56-3 42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
OEBA
1
CLKBA
1
CEBA
x
OEBA
x
CEAB
x
CEBA
xCLKAB
xCLKBA
xAx
xBx
GND
1
A
1
1
A
2
GND
1
B
1
1
B
2
V
CC
1
A
3
1
A
4
1
A
5
V
CC
1
B
3
1
B
4
1
B
5
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
V
TERM(4)
T
STG
I
OUT
Description
Terminal Voltage with
Respect to GND
Terminal Voltage with
Respect to GND
Terminal Voltage with
Respect to GND
Storage Temperature
DC Output Current
Max.
–0.5 to +4.6
–0.5 to +7.0
–0.5 to
V
CC
+ 0.5
–65 to +150
–60 to +60
Unit
V
V
V
°C
mA
GND
1
A
6
1
A
7
1
A
8
2
A
1
2
A
2
2
A
3
GND
1
B
6
1
B
7
1
B
8
2
B
1
2
B
2
2
B
3
GND
2
A
4
2
A
5
2
A
6
GND
2
B
4
2
B
5
2
B
6
3096 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Output and I/O terminals.
V
CC
2
A
7
2
A
8
V
CC
2
B
7
2
B
8
GND
2
CEAB
2
CLKAB
2
OEAB
GND
2
CEBA
2
CLKBA
2
OEBA
FUNCTION TABLE
(1,3)
Inputs
x
CEAB
H
X
L
L
X
xCLKAB
X
L
↑
↑
X
x
OEAB
L
L
L
L
H
xAx
X
X
L
H
X
Outputs
xBx
B
(2)
B
(2)
L
H
Z
SSOP/
TSSOP/TVSOP
TOP VIEW
3096 drw 03
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
I/O
I/O
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
3.5
3.5
Max. Unit
6.0
pF
8.0
pF
3096 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
NOTES:
3096 tbl 02
1. A-to-B data flow is shown: B-to-A data flow is similar but uses, x
CEBA
,
xCLKBA, and x
OEBA
.
2. Level of B before the indicated steady-state input conditions were
established.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
↑
= LOW-to-HIGH Transition
Z = High-impedance
8.10
2
IDT74FCT163952/A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= –40°C to +85°C, V
CC
= 2.7V to 3.6V
Symbol
V
IH
V
IL
I
I H
I
I L
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
V
OH
Parameter
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Input LOW Level
(Input and I/O pins)
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Output HIGH Voltage
V
CC
= Max.
V
CC
= Max.
V
I
= 5.5V
V
I
= V
CC
V
I
= GND
V
I
= GND
V
O
= V
CC
V
O
= GND
V
CC
= Min., I
IN
= –18mA
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3.0V
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –0.1mA
I
OH
= –3mA
I
OH
= –8mA
I
OL
= 0.1mA
I
OL
= 16mA
I
OL
= 24mA
V
CC
= 3.0V
I
OL
= 24mA
V
IN
= V
IH
or V
IL
V
CC
= Max., V
O
= GND
(3)
—
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
Min.
2.0
2.0
–0.5
—
—
—
—
—
—
—
–36
50
V
CC
–
0.2
2.4
2.4
(5)
—
—
—
—
–60
—
—
Typ.
(2)
—
—
—
Max.
5.5
V
CC
+0.5
0.8
Unit
V
V
—
—
—
—
—
—
–
0.7
±
1
±
1
±
1
±
1
±
1
±
1
–
1.2
µ
A
µ
A
V
mA
mA
V
–60
90
—
3.0
3.0
—
0.2
0.3
0.3
–
135
–110
200
—
—
—
0.2
0.4
0.55
0.50
–240
—
V
OL
Output LOW Voltage
V
I
OS
V
H
I
CCL
I
CCH
I
CCZ
Short Circuit Current
(4)
Input Hysteresis
Quiescent Power Supply Current
mA
mV
150
0.1
V
CC
= Max.,
V
IN
= GND or V
CC
10
µ
A
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= V
CC
–0.6V at rated current.
3096 lnk 05
8.10
3
IDT74FCT163952/A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
CC
= Max., Outputs Open
x
OEAB
or x
OEBA
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max., Outputs Open
f
CP
= 10MHz (xCLKAB)
50% Duty Cycle
x
OEAB
= x
CEAB
= GND
x
OEBA
= V
CC
One Bit Toggling
f
i
= 5MHz
50% Duty Cycle
V
CC
= Max., Outputs Open
f
CP
= 10MHz (xCLKAB)
50% Duty Cycle
x
OEAB
= x
CEAB
= GND
x
OEBA
= V
CC
Sixteen Bits Toggling
f
i
= 2.5MHz
50% Duty Cycle
V
IN
= V
CC
–0.6V
V
IN
= V
CC
V
IN
= GND
(3)
Min.
—
—
Typ.
(2)
2.0
60
Max.
100
100
Unit
µA
µA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
—
0.6
1.0
mA
V
IN
= V
CC
–0.6V
V
IN
= GND
—
0.6
1.1
V
IN
= V
CC
V
IN
= GND
—
3.0
5.0
(5)
V
IN
= V
CC
–0.6V
V
IN
= GND
—
3.0
5.9
(5)
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input; all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CCL,
I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
f
i
= Input Frequency
N
i
= Number of Inputs at fi
3096 tbl 07
8.10
4
IDT74FCT163952/A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(5)
FCT163952A
Symbol
Parameter
Condition
(1)
Min.
(2)
Max.
FCT163952B
Min.
(2)
Max.
FCT163952C
Min.
(2)
Max.
Unit
Propagation Delay
C
L
= 50pF
xCLKAB, xCLKBA to xBx, xAx R
L
= 500Ω
Output Enable Time
x
OEBA
, x
OEAB
to xAx, xBx
Output Disable Time
x
OEBA
, x
OEAB
to xAx, xBx
Set-up Time HIGH or LOW
xAx, xBx to xCLKAB, xCLKBA
t
H
Hold Time HIGH or LOW
xAx, xBx to xCLKAB, xCLKBA
t
SU
Set-up Time HIGH or LOW
x
CEAB
, x
CEBA
to xCLKAB,
xCLKBA
t
H
Hold Time HIGH or LOW
x
CEAB
, x
CEBA
to xCLKAB,
xCLKBA
t
W
Pulse Width HIGH or LOW
xCLKAB or xCLKBA
(4)
t
SK
(o) Output Skew
(3)
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
2.0
1.5
1.5
2.5
2.0
3.0
10.0
10.5
10.0
—
—
—
2.0
1.5
1.5
2.5
1.5
3.0
7.5
8.0
7.5
—
—
—
2.0
1.5
1.5
2.5
1.5
3.0
6.3
7.0
6.5
—
—
—
ns
ns
ns
ns
ns
ns
2.0
—
2.0
—
2.0
—
ns
3.0
—
—
0.5
3.0
—
—
0.5
3.0
—
—
0.5
ns
ns
NOTES:
3096 tbl 08
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This parameter is guaranteed but not tested.
5. Propagation Delays and Enable/Disable times are with V
CC
= 3.3V
±0.3V,
Normal Range. For V
CC
= 2.7V to 3.6V, Extended Range, all Propagation Delays
and Enable/Disable times should be degraded by 20%.
8.10
5
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