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PCX750PMGU333LE

Description
RISC Microprocessor, 32-Bit, 333MHz, CMOS, CBGA360, 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size305KB,42 Pages
ManufacturerAtmel (Microchip)
Download Datasheet Parametric View All

PCX750PMGU333LE Overview

RISC Microprocessor, 32-Bit, 333MHz, CMOS, CBGA360, 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360

PCX750PMGU333LE Parametric

Parameter NameAttribute value
MakerAtmel (Microchip)
Parts packaging codeBGA
package instructionBGA,
Contacts360
Reach Compliance Codeunknown
ECCN code3A001.A.2.C
Address bus width32
bit size32
boundary scanYES
maximum clock frequency100 MHz
External data bus width64
FormatFLOATING POINT
Integrated cacheYES
JESD-30 codeS-CBGA-B360
length25 mm
low power modeYES
Number of terminals360
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeBGA
Package shapeSQUARE
Package formGRID ARRAY
Certification statusNot Qualified
Maximum seat height3.2 mm
speed333 MHz
Maximum supply voltage2 V
Minimum supply voltage1.8 V
Nominal supply voltage1.9 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formBALL
Terminal pitch1.27 mm
Terminal locationBOTTOM
width25 mm
uPs/uCs/peripheral integrated circuit typeMICROPROCESSOR, RISC
Features
H
12.4SPECint95,8.4SPECfp95 @266Mhz (750P)
w/1MB L2 @133Mhz
H
13.5SPECint95, 9SPECfp95 @300Mhz (740P)
H
488 MIPS @ 266Mhz
H
Selectable bus clock (11 CPU bus dividers up to 8x)
H
P
D
typical 4,2W @ 333Mhz, full operating conditions.
H
Nap, doze and sleep modes for power savings
H
Superscalar (3 instructions per clock cycle)
H
4G-Byte direct addressing range.
H
64-bit data and 32-bit address bus interface.
H
32KB instruction and data cache.
H
Six independent execution units and two register files.
H
Write-back and write-through operations.
H
f
int
max = 333Mhz
H
f
bus
max = 100Mhz
H
Compatible CMOS input / TTL output
PCX750P/740P
PowerPC750P/740P
RISC MICROPRO-
CESSOR
Family
Pid8t-750P/740P
Specification
Preliminary
Description
The PCX750P and PCX740P microprocessor (after named 750P/740P) are low-power imple-
mentations of the PowerPC Reduced Instruction Set Computer (RISC) architecture.
The 750P/740P microprocessors designs are superscalar, capable of issuing three instructions
per clock cycle into six independent execution units
The 740P/750P microprocessors uses a 1,9/3,3-volts CMOS process technology and maintains
full interface compatibility with TTL devices.
The 750P/740P provides four software controlable power-saving modes and a thermal assist
unit management.
The 750P/740P microprocessors have separate 32-Kbyte, physically-addressed instruction
and data caches and differ only in that the 750P features a dedicated L2 cache interface with
on-chip L2 tags.
Both are software and bus-compatible with the PowerPC603 and PowerPC604 families, and are
fully JTAG compliant.
The 740P microprocessor is pin compatible with the TSPC603e family.
G suffix
GS suffix
CBGA255 and CBGA360
Ceramic Ball Grid Array
CI-CGA255 and CI-CGA360
Ceramic Ball Grid Array
with Solder Column Interposer (SCI)
Screening
This product is manufactured in full compliance with :
H
CBGA upscreenings based upon ATMEL-Grenoble standards
H
Full military temperature range (Tc=-55
o
C,+125
o
C)
industrial temperature range (Tc=-40
o
C,+110
o
C)
H
CI-CGA versions of 740P and 750P (TBC)
August 2000
1/42
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