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HD64404BT

Description
RISC PROCESSOR, PBGA352, TBGA-352
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size5MB,1210 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric Compare View All

HD64404BT Overview

RISC PROCESSOR, PBGA352, TBGA-352

HD64404BT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerRenesas Electronics Corporation
Parts packaging codeBGA
package instructionFBGA, BGA352,26X26,32
Contacts352
Reach Compliance Codeunknown
ECCN code3A991.A.2
Address bus width32
bit size32
boundary scanYES
maximum clock frequency33.33 MHz
External data bus width32
FormatFIXED POINT
Integrated cacheNO
JESD-30 codeS-PBGA-B352
JESD-609 codee0
length23 mm
low power modeYES
Number of terminals352
Package body materialPLASTIC/EPOXY
encapsulated codeFBGA
Encapsulate equivalent codeBGA352,26X26,32
Package shapeSQUARE
Package formGRID ARRAY, FINE PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply1.5,3.3 V
Certification statusNot Qualified
Maximum seat height1.8 mm
speed100 MHz
Maximum supply voltage1.6 V
Minimum supply voltage1.4 V
Nominal supply voltage1.5 V
surface mountYES
technologyCMOS
Terminal surfaceTIN LEAD
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width23 mm
uPs/uCs/peripheral integrated circuit typeMICROPROCESSOR, RISC

HD64404BT Preview

To all our customers
Information regarding change of names mentioned
within this document, to Renesas Technology Corp.
On April 1
st
2003 the following semiconductor operations were transferred to
Renesas Technology Corporation: operations covering microcomputer, logic,
analog and discrete devices, and memory chips other than DRAMs (flash
memory, SRAMs etc.).
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other
Hitachi brand names are mentioned in the document, these names have all
been changed to Renesas Technology Corporation.
Except for our corporate trademark, logo and corporate statement, no
changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the
document itself.
Thank you for your understanding.
Renesas Technology Home Page: www.renesas.com
Renesas Technology Corp.
April 1, 2003
Renesas Technology Corp.
SuperH™ RISC engine Peripheral LSI
HD64404
Hardware Manual
ADE-607-042
Rev. 1.0
09/13/02
Hitachi, Ltd.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Rev. 1.0, 09/02, page ii of xliv
General Precautions on Handling of Product
1. Treatment of NC Pins
Note: Do not connect anything to the NC pins.
The NC (not connected) pins are either not connected to any of the internal circuitry or are
they are used as test pins or to reduce noise. If something is connected to the NC pins, the
operation of the LSI is not guaranteed.
2. Treatment of Unused Input Pins
Note: Fix all unused input pins to high or low level.
Generally, the input pins of CMOS products are high-impedance input pins. If unused pins
are in their open states, intermediate levels are induced by noise in the vicinity, a pass-
through current flows internally, and a malfunction may occur.
3. Processing before Initialization
Note: When power is first supplied, the product’s state is undefined.
The states of internal circuits are undefined until full power is supplied throughout the
chip and a low level is input on the reset pin. During the period where the states are
undefined, the register settings and the output state of each pin are also undefined. Design
your system so that it does not malfunction because of processing while it is in this
undefined state. For those products which have a reset function, reset the LSI immediately
after the power supply has been turned on.
4. Prohibition of Access to Undefined or Reserved Addresses
Note: Access to undefined or reserved addresses is prohibited.
The undefined or reserved addresses may be used to expand functions, or test registers
may have been be allocated to these addresses. Do not access these registers; the system’s
operation is not guaranteed if they are accessed.
Rev. 1.0, 09/02, page iii of xliv
Configuration of This Manual
This manual comprises the following items:
1. General Precautions on Handling of Product
2. Configuration of This Manual
3. Preface
4. Contents
5. Overview
6. Description of Functional Modules
System-Control Modules
On-Chip Peripheral Modules
The configuration of the functional description of each module differs according to the
module. However, the generic style includes the following items:
i) Feature
ii) Input/Output Pin
iii) Register Description
iv) Operation
v) Usage Note
When designing an application system that includes this LSI, take notes into account. Each
section includes notes in relation to the descriptions given, and usage notes are given, as required,
as the final part of each section.
7. Electrical Characteristics
8. Appendix
9. Main Revisions and Additions in this Edition (only for revised versions)
The list of revisions is a summary of points that have been revised or added to earlier versions.
This does not include all of the revised contents. For details, see the actual locations in this
manual.
10. Index
Rev. 1.0, 09/02, page iv of xliv

HD64404BT Related Products

HD64404BT HD64404BTV
Description RISC PROCESSOR, PBGA352, TBGA-352 100MHz, RISC PROCESSOR, PBGA352, TBGA-352
Is it Rohs certified? incompatible conform to
Maker Renesas Electronics Corporation Renesas Electronics Corporation
Parts packaging code BGA BGA
package instruction FBGA, BGA352,26X26,32 TBGA-352
Contacts 352 352
Reach Compliance Code unknown compliant
ECCN code 3A991.A.2 3A991.A.2
Address bus width 32 32
boundary scan YES YES
maximum clock frequency 33.33 MHz 33.33 MHz
External data bus width 32 32
Format FIXED POINT FIXED POINT
Integrated cache NO NO
JESD-30 code S-PBGA-B352 S-PBGA-B352
JESD-609 code e0 e1
length 23 mm 23 mm
low power mode YES YES
Number of terminals 352 352
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code FBGA FBGA
Package shape SQUARE SQUARE
Package form GRID ARRAY, FINE PITCH GRID ARRAY, FINE PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED 260
Certification status Not Qualified Not Qualified
Maximum seat height 1.8 mm 1.8 mm
speed 100 MHz 100 MHz
Maximum supply voltage 1.6 V 1.6 V
Minimum supply voltage 1.4 V 1.4 V
Nominal supply voltage 1.5 V 1.5 V
surface mount YES YES
technology CMOS CMOS
Terminal surface TIN LEAD TIN SILVER COPPER
Terminal form BALL BALL
Terminal pitch 0.8 mm 0.8 mm
Terminal location BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED 20
width 23 mm 23 mm
uPs/uCs/peripheral integrated circuit type MICROPROCESSOR, RISC MICROPROCESSOR, RISC

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