VSP2080 provides correlated double sampling to ex-
tract the video information from the pixels, 0dB to
+34dB gain range with analog control for varying
illumination conditions, and black level clamping for
an accurate black reference. The stable gain control is
linear in dB. Additionally, the black level quickly
recovers after screen changes. The MODE pin allows
the selection of logic-input polarity. The VSP2080 is
available in a 20-lead TSSOP package.
APPLICATIONS
q
q
q
q
VIDEO CAMERAS
DIGITAL STILL CAMERAS
PC CAMERAS
SECURITY CAMERAS
REFCK
DATCK
MODE
AGC IN
C
OB
Logic Input
Polarity
Control
Optical
Black Level
Auto-Zero
Clamp
OUT
CCD
OUT
CCD D
Correlated
Double
Sampling
+6dB
Log
VCA
+28dB
CCD R
Dummy
Pixel
Auto-Zero
Internal
Bias
Generator
DUMC
REFT
REFB
REF IN
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
Analog Input .......................................................... –0.3V to (+V
DDA
+0.3V)
Logic Input ............................................................ –0.3V to (+V
DDA
+0.3V)
Case Temperature ......................................................................... +100°C
Junction Temperature .................................................................... +150°C
Storage Temperature ..................................................................... +150°C
14
15
16
17
18
19
20
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER
(1)
353
"
SPECIFIED
TEMPERATURE
RANGE
–25°C to +85°C
"
PACKAGE
MARKING
VSP2080T
"
ORDERING
NUMBER
(2)
VSP2080T
VSP2080T/2K
TRANSPORT
MEDIA
250-Piece Tray
Tape and Reel
PRODUCT
VSP2080T
"
PACKAGE
20-Lead TSSOP
"
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are
available only in Tape and Reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering 2000 pieces of “VSP2080T/2K” will get a single 2000-
piece Tape and Reel.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
®
3
VSP2080
TIMING DIAGRAM
27MHz
Feedthrough Data Output Interval
CDS Input
(CCD Output)
N
N+1
REFCK
(Pin 7)
DATCK
(Pin 8)
t
1
t
0
t
3
t
2
t
4
2.0V
ANALOG OUTPUT
(Pin 3)
1.03V
N+2
SYMBOL
t
0
t
1
t
2
t
3
t
4
PARAMETER
REFCK Pulse Width
REFCK Sampling Delay
DATCK Pulse Width
DATCK Sampling Delay
Analog Output Settling Time
(1)
MIN
11
1.5
11
1.5
TYP
14
2
14
2
110
MAX
UNITS
ns
ns
ns
ns
ns
NOTE: (1) C
LOAD
= 5pF.
TYPICAL PERFORMANCE CURVES
At T
A
= +25°C, V
DD
= +3.0V, and conversion rate = 18MHz, unless otherwise specified.
GAIN CONTROL CHARACTERISTICS
40
35
60
50
QUIESCENT CURRENT vs POWER SUPPLY
25
Quiescent Current (mA)
0.0
0.5
1.0
1.5
AGC
IN
Input (V)
2.0
2.5
3.0
30
40
30
20
10
0
2.7
3.0
Power Supply Voltage (V)
3.3
Gain (dB)
20
15
10
5
0
–5
–10
®
VSP2080
4
THEORY OF OPERATION
The VSP2080 contains all of the key features associated with
the processing of analog signals in a CCD video camera or
digital still camera. Figure 1 shows a simplified block
diagram of the VSP2080. The output from the CCD array is
first clamped to an internal reference of +1V. This sets the
proper signal range for the input of the Correlated Double
Sampler (CDS). The CDS operates at at gain of 2 and
provides a differential output. Its output drives a voltage-
controlled attenuator with a logarithmic control characteris-
tic. An output amplifier drives this signal to external cir-
cuitry and sets the proper black level for the ADS900 A/D
converter.
CORRELATED DOUBLE SAMPLER (CDS)
The CDS removes low frequency noise from the output of
the image sensor. Refer to Figure 2 which shows a block
diagram of the CDS. The output from the CCD array is
sampled during the reference interval as well as during the
data interval. Noise that is present at the input and is of a
period greater than the pixel interval will be eliminated by
subtraction.
The VSP2080 employs a three track-and-hold correlated
double sampler architecture. Track/Hold 2 samples the CCD
noise during the reference interval as driven by the REFCK
signal. Track/Hold 3 resamples this level at the same time
that Track/Hold 1 samples the video information as driven
by the DATCK signal. This is done to remove large tran-
sients from Track/Hold 2 that result from a portion of the
reset transient being present during the acquisition time of
this track-and-hold. The output of Track/Hold 2 is buffered
by a voltage follower.
Dummy
Feedback
Loop
DUMC
OB
Black Level
Auto-Zero
Loop
CCD
OUT
CCD D
CDS
C
EXT
VCA
Output
Amplifier
Clamp
Analog
Output
REFCK DATCK
Gain Control
FIGURE 1. Simplified Block Diagram of VSP2080.
CCD
OUT
CCD D
C
EXT
Data Sampling Channel
Reference Sampling
Channel
T/H1
To VCA
T/H3
T/H2
1V
DUMC REFCK
DATCK
FIGURE 2. Simplified Block Diagram of Correlated Double Sampler.
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