MX29SL800C T/B
MX29SL802C T/B
8M-BIT [1M x 8 / 512K x 16] SINGLE VOLTAGE
1.8V ONLY FLASH MEMORY
FEATURES
GENERAL FEATURES
• Single Power Supply Operation
- 1.65 to 2.2 volt for read, erase, and program operations
• 1,048,576 x 8 / 524,288 x 16 switchable
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Sector Structure
- 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1, and 64K-Byte x 15
• Sector protection
- Hardware method to disable any combination of sectors from program or erase operations
- Temporary sector unprotected allows code changes in previously locked sectors
• Latch-up protected to 100mA from -1V to Vcc + 1V
• Compatible with JEDEC standard
- Pinout and software compatible to single power supply Flash
PERFORMANCE
• High Performance
- Access time: 90ns
- Byte/Word program time: 12us/18us (typical)
- Erase time: 1.3s/sector, 18s/chip (typical)
• Low Power Consumption
- Low active read current: 6mA (maximum) at 5MHz
- Low standby current: 1uA (typical)
• Minimum 100,000 erase/program cycle
• 10 years data retention
SOFTWARE FEATURES
• Erase Suspend/ Erase Resume
- Suspends sector erase operation to read data from or program data to another sector which is not being erased
• Status Reply
- Data# Polling & Toggle bits provide detection of program and erase operation completion
• Support Common Flash Interface (CFI)
HARDWARE FEATURES
• Ready/Busy# (RY/BY#) Output
- Provides a hardware method of detecting program and erase operation completion
• Hardware Reset (RESET#) Input
- Provides a hardware method to reset the internal state machine to read mode
PACKAGE
• 48-Pin TSOP
• 48-Ball CSP (LFBGA/TFBGA/WFBGA)
• 48-Ball XFLGA
•
All Pb-free devices are RoHS Compliant
P/N:PM1244
REV. 2.0, NOV. 20, 2008
1
TI Technology Forum
京公网安备 11010802033920号
EEWORLD
