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LP3990SDX-1.5/NOPB

Description
IC VREG 1.5 V FIXED POSITIVE REGULATOR, PDSO6, ROHS COMPLIANT, LLP-6, Fixed Positive Single Output Standard Regulator
CategoryPower/power management    The power supply circuit   
File Size372KB,15 Pages
ManufacturerNational Semiconductor(TI )
Websitehttp://www.ti.com
Environmental Compliance
Stay tuned Parametric Compare

LP3990SDX-1.5/NOPB Overview

IC VREG 1.5 V FIXED POSITIVE REGULATOR, PDSO6, ROHS COMPLIANT, LLP-6, Fixed Positive Single Output Standard Regulator

LP3990SDX-1.5/NOPB Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNational Semiconductor(TI )
package instructionROHS COMPLIANT, LLP-6
Reach Compliance Codeunknown
ECCN codeEAR99
AdjustabilityFIXED
Nominal dropback voltage 10.12 V
Maximum absolute input voltage6.5 V
Maximum input voltage6 V
Minimum input voltage2 V
JESD-30 codeS-PDSO-N6
JESD-609 codee3
length3 mm
Maximum grid adjustment rate0.00525%
Maximum load regulation0.018%
Humidity sensitivity level1
Number of functions1
Output times1
Number of terminals6
Working temperatureTJ-Max125 °C
Working temperature TJ-Min-40 °C
Maximum output current 10.15 A
Maximum output voltage 11.545 V
Minimum output voltage 11.455 V
Nominal output voltage 11.5 V
Package body materialPLASTIC/EPOXY
encapsulated codeHVSON
Encapsulate equivalent codeSOLCC6,.13,38
Package shapeSQUARE
Package formSMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Regulator typeFIXED POSITIVE SINGLE OUTPUT STANDARD REGULATOR
Maximum seat height0.8 mm
surface mountYES
technologyCMOS
Terminal surfaceMatte Tin (Sn)
Terminal formNO LEAD
Terminal pitch0.95 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
Maximum voltage tolerance3%
width3 mm

LP3990SDX-1.5/NOPB Related Products

LP3990SDX-1.5/NOPB LP3990SDX-0.8/NOPB LP3990SDX-2.5/NOPB
Description IC VREG 1.5 V FIXED POSITIVE REGULATOR, PDSO6, ROHS COMPLIANT, LLP-6, Fixed Positive Single Output Standard Regulator IC VREG 0.8 V FIXED POSITIVE REGULATOR, PDSO6, ROHS COMPLIANT, LLP-6, Fixed Positive Single Output Standard Regulator IC VREG 2.5 V FIXED POSITIVE REGULATOR, PDSO6, ROHS COMPLIANT, LLP-6, Fixed Positive Single Output Standard Regulator
Is it Rohs certified? conform to conform to conform to
Maker National Semiconductor(TI ) National Semiconductor(TI ) National Semiconductor(TI )
package instruction ROHS COMPLIANT, LLP-6 ROHS COMPLIANT, LLP-6 ROHS COMPLIANT, LLP-6
Reach Compliance Code unknown unknown unknown
ECCN code EAR99 EAR99 EAR99
Adjustability FIXED FIXED FIXED
Maximum absolute input voltage 6.5 V 6.5 V 6.5 V
Maximum input voltage 6 V 6 V 6 V
Minimum input voltage 2 V 2 V 2 V
JESD-30 code S-PDSO-N6 S-PDSO-N6 S-PDSO-N6
JESD-609 code e3 e3 e3
length 3 mm 3 mm 3 mm
Maximum grid adjustment rate 0.00525% 0.00336% 0.00625%
Maximum load regulation 0.018% 0.00953% 0.0186%
Humidity sensitivity level 1 1 1
Number of functions 1 1 1
Output times 1 1 1
Number of terminals 6 6 6
Working temperatureTJ-Max 125 °C 125 °C 125 °C
Working temperature TJ-Min -40 °C -40 °C -40 °C
Maximum output current 1 0.15 A 0.15 A 0.15 A
Maximum output voltage 1 1.545 V 0.824 V 2.575 V
Minimum output voltage 1 1.455 V 0.776 V 2.425 V
Nominal output voltage 1 1.5 V 0.8 V 2.5 V
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code HVSON HVSON HVSON
Encapsulate equivalent code SOLCC6,.13,38 SOLCC6,.13,38 SOLCC6,.13,38
Package shape SQUARE SQUARE SQUARE
Package form SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
method of packing TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260 260
Certification status Not Qualified Not Qualified Not Qualified
Regulator type FIXED POSITIVE SINGLE OUTPUT STANDARD REGULATOR FIXED POSITIVE SINGLE OUTPUT STANDARD REGULATOR FIXED POSITIVE SINGLE OUTPUT STANDARD REGULATOR
Maximum seat height 0.8 mm 0.8 mm 0.8 mm
surface mount YES YES YES
technology CMOS CMOS CMOS
Terminal surface Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Terminal form NO LEAD NO LEAD NO LEAD
Terminal pitch 0.95 mm 0.95 mm 0.95 mm
Terminal location DUAL DUAL DUAL
Maximum time at peak reflow temperature 40 40 40
Maximum voltage tolerance 3% 3% 3%
width 3 mm 3 mm 3 mm
Nominal dropback voltage 1 0.12 V - 0.12 V

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