VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7958
Features
• 2.5Gb/s Data Rates (OC-48/SDH-16)
• Input Offset Error Cancellation
• Single 5V Power Supply
• Fully Differential Architecture
2.5Gb/s High Speed Limiting Post Amplifier
for OC-48/SDH-16 Applications
General Description
The Vitesse high speed limiting amplifier is intended for use as a post amplifier in wide band fiber optic
links with data rates up to 2.5Gb/s. This amplifier provides very high sensitivity and broadband operation with a
fully differential architecture. Additional features include on-chip, offset-correction circuitry to provide excel-
lent pulse width distortion characteristics.
VSC7958 Block Diagram
VBR
VSS
GND
VREF-
50
VIN-
VIN+
50
VREF+
Chip Boundary
VOUT-
A1
A2
VOUT+
-
+
VBF
VBS
G52184-0, Rev 3.0
05/14/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 1
VITESSE
SEMICONDUCTOR CORPORATION
2.5Gb/s High Speed Limiting Post Amplifier
for OC-48/SDH-16 Applications
Table 1: Electrical Specifications
Preliminary Data Sheet
VSC7958
All min and max values are tested at V
SS
= -4.5V and -5.5V, unless otherwise noted. All min and max values are guaranteed from
T
CASE
= 0°C to 85°C, unless otherwise noted.
Symbol
V
IN
±
(1)
(V
IN
+) - (V
IN
-)
(1)
(V
REF
+) - (V
REF
-)
Parameter
Input Voltage Swing
Input Voltage Swing
Input Offset Voltage Swing
Min
-
-
-
320
-
90
-
26
-
-
-
-
-
-
Typ
-
-
10
500
-0.5
100
100
30
3
30
15
15
80
15
Max
800
1600
25
1200
-
110
-
45
-
-
-
-
100
-
Units
mV
p-p
mV
p-p
mV
mV
p-p
V
%
ps
dB
GHz
kHz
dB
dB
mA
dB
µV
rms
°C/W
Conditions
Single-ended source
Differential source
V
IN
= 0
Differential Output Swing.
V
IN
= 8mV, Differential
Input peak-to-peak
Measured to ground
20%-80%, 25°C,
V
IN
= 50mV
V
IN
= 4mV
p-p
single-
ended
25°C, V
IN
= 4mV
p-p
25°C, V
IN
= 4mV
p-p
At 1.5GHz
At 1.5GHz
8kHz to 18GHz
Total single-ended output
noise voltage divided by
small-signal gain. 8kHz to
18GHz
Junction-to-case
(V
OUT
+) - (V
OUT
-) Output Voltage Swing
V
OFFSET
PW%
t
R
, t
F
G
f
MAX(1)
f
MIN(1)
S
11(1)
S
22(1)
I
SS
NF
(1)
V
NR(1)
θ
JC
Output DC Offset Voltage
Output Pulse Width
Rise and Fall Time
Small Signal Gain
Small Signal -3dB Bandwidth
Low Frequency -3dB Cutoff
Input Return Loss Reference to 50Ω
Output Return Loss Reference to 50Ω
Supply Current
Noise Figure
Input Referred Wide Band Noise
-
170
-
Thermal Resistance
-
30
-
NOTE:(1) These values are not measured during production test. These values are results of engineering characterization.
Page 2
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52184-0, Rev 3.0
05/14/01
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7958
2.5Gb/s High Speed Limiting Post Amplifier
for OC-48/SDH-16 Applications
Figure 1: Typical Output Voltage vs. Input Voltage of Limiting Amplifier
Output Voltage vs. Input Voltage
1000
Single-Ended Output Voltage (mV)
100
10
1
1
13
20
100
260
500
Single-Ended Input Voltage (mV)
Absolute Maximum Ratings
(1)
(at T
A
= 25°C unless otherwise specified)
Power Supply Voltage (V
SS
) ...............................................................................................................-7V to -0.5V
Power Dissipation.............................................................................................................................................. 1W
All Pins ................................................................................................................................................V
SS
to + .5V
(VREF+) - (VIN+): .......................................................................................................................................... ±2V
(VREF-) - (VIN-): ........................................................................................................................................... ±2V
Storage Temperature Range (T
STG
)................................................................................................ -40°C to 125°C
Operating Temperature Range............................................................................................................0°C to 100°C
NOTE: (1) CAUTION: Stresses listed under “Absolute Maximum Ratings” may be applied to devices one at a time without caus-
ing permanent damage. Functionality at or above the values listed is not implied. Exposure to these values for extended
periods may affect device reliability.
Recommended Operating Conditions
Case Temperature Range (T
C
)..............................................................................................................0°C to 85°C
Negative Voltage Rail (V
SS
) .............................................................................................................-5.5V to -4.7V
Bit Rate = 2.488Gb/s NRZ and data pattern = 2
23
-1 PRBS, unless otherwise specified.
G52184-0, Rev 3.0
05/14/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 3
VITESSE
SEMICONDUCTOR CORPORATION
2.5Gb/s High Speed Limiting Post Amplifier
for OC-48/SDH-16 Applications
Preliminary Data Sheet
VSC7958
Package Pin Descriptions
Figure 2: Pin Configuration
.230
GND GND VBS VBF
16
15
14
13
GND
VOUT+
VOUT-
GND
1
2
3
4
12
VREF+
.030
VIN+
VIN-
VREF-
.012
VSC7958
11
10
9
5
6
7
8
GND GND VSS VBR
(TOP VIEW)
.366
.050
0.005
(SIDE VIEW)
*All values are typical in inches
Page 4
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52184-0, Rev 3.0
05/14/01
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7958
Package Information
2.5Gb/s High Speed Limiting Post Amplifier
for OC-48/SDH-16 Applications
Figure 3: Package Dimensions
E1
E
D1
Key
A
A1
A2
D
D1
E
Dimension
0.054
0.003
0.050
0.366
0.225
0.366
0.225
0.020
0.030
0.012
0.013
0.013
0.020
Tolerance
REF
±0.003
REF
±0.010
±0.005
±0.010
±0.005
±0.005
REF
Typ.
0-10
±0.003
±0.003
D
A
E1
L
e
b
θ
A2
e
R
R1
Shoulder
All Dimensions in inches
R
Sholder
A1
—C—
θ
R1
L
b
—C—
LEAD COPLANARITY
G52184-0, Rev 3.0
05/14/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 5
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