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WS512K8L-25MA

Description
SRAM Module, 512KX8, 25ns, CMOS, CDIP32, 0.600 INCH, CERAMIC, DIP-32
Categorystorage    storage   
File Size223KB,6 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
Download Datasheet Parametric View All

WS512K8L-25MA Overview

SRAM Module, 512KX8, 25ns, CMOS, CDIP32, 0.600 INCH, CERAMIC, DIP-32

WS512K8L-25MA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instruction0.600 INCH, CERAMIC, DIP-32
Reach Compliance Codeunknown
Maximum access time25 ns
JESD-30 codeR-CDIP-T32
length42.4 mm
memory density4194304 bit
Memory IC TypeSRAM MODULE
memory width8
Number of functions1
Number of terminals32
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize512KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height5.13 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width15.24 mm
White Electronic Designs
512Kx8 SRAM MODULE, SMD 5962-92078
FEATURES
Access Times 20, 25, 35, 45ns
Standard Microcircuit Drawing, 5962-92078
MIL-STD-883 Compliant Devices Available
JEDEC Standard 32 pin, Hermetic Ceramic DIP
(Package 300)
Commercial, Industrial and Military Temperature
Range (-55°C to +125°C)
Organized as 512K x 8
5V Power Supply
Low Power CMOS
WS512K8-XCX
TTL Compatible Inputs and Outputs
Battery Back-Up Operation
FIGURE 1 – PIN CONFIGURATION
PIN DESCRIPTION
A0-18
I/O 0-7
CS#
OE#
WE#
V
CC
GND
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
TOP VIEW
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
BLOCK DIAGRAM
A0-16
I/O0-7
WE#
OE#
128K x 8
128K x 8
128K x 8
128K x 8
A17
A18
CS#
Decoder
December 2004
Rev. 5
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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