CAT28LV256NA-20T datasheet, PDF

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CAT28LV256NA-20T: DescriptionIC 32K X 8 EEPROM 3V, 200 ns, PQCC32, PLASTIC, LCC-32, Programmable ROM; Categorystorage storage; File Size70KB，12 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn

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CAT28LV256NA-20T Overview

IC 32K X 8 EEPROM 3V, 200 ns, PQCC32, PLASTIC, LCC-32, Programmable ROM

CAT28LV256NA-20T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ON Semiconductor
Parts packaging code	QFJ
package instruction	PLASTIC, LCC-32
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	200 ns
JESD-30 code	R-PQCC-J32
JESD-609 code	e0
length	13.97 mm
memory density	262144 bit
Memory IC Type	EEPROM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
organize	32KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
Programming voltage	3 V
Certification status	Not Qualified
Maximum seat height	3.55 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	11.43 mm
Maximum write cycle time (tWC)	10 ms

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CAT28LV256

256K-Bit CMOS PARALLEL EEPROM

FEATURES

3.0V to 3.6V Supply

Read Access Times: 200/250/300 ns

Low Power CMOS Dissipation:

CMOS and TTL Compatible I/O

Automatic Page Write Operation:

– Active: 15 mA Max.

– Standby: 150

A Max.

Simple Write Operation:

– 1 to 64 Bytes in 10ms

– Page Load Timer

End of Write Detection:

– On-Chip Address and Data Latches

– Self-Timed Write Cycle with Auto-Clear

Fast Write Cycle Time:

– Toggle Bit

–

DATA

Polling

Hardware and Software Write Protection

100,000 Program/Erase Cycles

100 Year Data Retention

– 10ms Max.

Commercial, Industrial and Automotive

Temperature Ranges

DESCRIPTION

The CAT28LV256 is a fast, low power, low voltage

CMOS Parallel E

PROM organized as 32K x 8-bits. It

requires a simple interface for in-system programming.

On-chip address and data latches, self-timed write cycle

with auto-clear and V

power up/down write protection

eliminate additional timing and protection hardware.

DATA

Polling and Toggle status bits signal the start and

end of the self-timed write cycle. Additionally, the

CAT28LV256 features hardware and software write

protection.

The CAT28LV256 is manufactured using Catalyst’s

advanced CMOS floating gate technology. It is designed

to endure 100,000 program/erase cycles and has a data

retention of 100 years. The device is available in JEDEC–

approved 28-pin DIP, 28-pin TSOP or 32-pin PLCC

packages.

BLOCK DIAGRAM

A6–A14

ADDR. BUFFER

& LATCHES

INADVERTENT

WRITE

PROTECTION

ROW

DECODER

32,768 x 8

PROM

ARRAY

64 BYTE PAGE

VCC

HIGH VOLTAGE

GENERATOR

CONTROL

LOGIC

I/O BUFFERS

TIMER

DATA POLLING

AND

TOGGLE BIT

COLUMN

DECODER

28LV256 F01

I/O0–I/O7

A0–A5

ADDR. BUFFER

& LATCHES

Characteristics subject to change without notice

Doc. No. MD-1071, Rev. E

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