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Datasheet> All Categories > Analog mixed-signal IC> converter> LTC2283IUP#TR
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LTC2283IUP#TR

Description
LTC2283 - Dual 12-Bit, 125Msps Low Power 3V ADC; Package: QFN; Pins: 64; Temperature Range: -40°C to 85°C
CategoryAnalog mixed-signal IC    converter   
File Size569KB，24 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
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LTC2283IUP#TR Overview

LTC2283 - Dual 12-Bit, 125Msps Low Power 3V ADC; Package: QFN; Pins: 64; Temperature Range: -40°C to 85°C

LTC2283IUP#TR Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?incompatible
MakerLinear ( ADI )
Parts packaging codeQFN
package instructionVQCCN, LCC64,.35SQ,20
Contacts64
Manufacturer packaging codeUP
Reach Compliance Codenot_compliant
ECCN code3A991.C.2
Maximum analog input voltage1 V
Minimum analog input voltage-1 V
Converter typeADC, PROPRIETARY METHOD
JESD-30 codeS-PQCC-N64
JESD-609 codee0
length9 mm
Maximum linear error (EL)0.0488%
Humidity sensitivity level1
Number of analog input channels1
Number of digits12
Number of functions2
Number of terminals64
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output bit codeOFFSET BINARY, 2\'S COMPLEMENT BINARY
Output formatPARALLEL, WORD
Package body materialPLASTIC/EPOXY
encapsulated codeVQCCN
Encapsulate equivalent codeLCC64,.35SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)235
power supply3 V
Certification statusNot Qualified
Sampling rate125 MHz
Sample and hold/Track and holdSAMPLE
Maximum seat height0.8 mm
Nominal supply voltage3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width9 mm

LTC2283IUP#TR Preview

LTC2283
Dual 12-Bit, 125Msps
Low Power 3V ADC
FEATURES
n
n
n
n
n
n
n
n
n
n
n
n
DESCRIPTION
The LTC
®
2283 is a 12-bit 125Msps, low power dual 3V
A/D converter designed for digitizing high frequency,
wide dynamic range signals. The LTC2283 is perfect for
demanding imaging and communications applications
with AC performance that includes 70.1dB SNR and 82dB
SFDR for signals at the Nyquist frequency.
Typical DC specs include ±0.4LSB INL, ±0.2LSB DNL. The
transition noise is a low 0.32LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic.
A single-ended CLK input controls converter operation.
An optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
A data ready output clock (CLKOUT) can be used to latch
the output data.
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
n
Integrated Dual 12-Bit ADCs
Sample Rate: 125Msps
Single 3V Supply (2.85V to 3.4V)
Low Power: 790mW
70.2dB SNR, 88dB SFDR
110dB Channel Isolation at 100MHz
Flexible Input: 1V
P-P
to 2V
P-P
Range
640MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Data Ready Output Clock
Pin Compatible Family
125Msps: LTC2283 (12-Bit), LTC2285 (14-Bit)
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
64-Pin (9mm × 9mm) QFN Package
APPLICATIONS
n
n
n
n
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATION
+
ANALOG
INPUT A
INPUT
S/H
OV
DD
12-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D11A
D0A
OGND
SNR (dBFS)
•
•
•
SNR vs Input Frequency,
–1dB, 2V Range
73
72
71
70
69
68
67
66
–
CLK A
CLOCK/DUTY CYCLE
CONTROL
CLOCK/DUTY CYCLE
CONTROL
OF
MUX
CLK B
CLKOUT
OV
DD
65
0
50
100 150 200 250 300 350
INPUT FREQUENCY (MHz)
2283 TA01b
+
ANALOG
INPUT B
INPUT
S/H
–
12-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D11B
D0B
OGND
2283 TA01
•
•
•
2283fb
1
LTC2283
ABSOLUTE MAXIMUM RATINGS
OV
DD
= V
DD
(Notes 1, 2)
PIN CONFIGURATION
TOP VIEW
64 GND
63 V
DD
62 SENSEA
61 VCMA
60 MODE
59 SHDNA
58
OEA
57 OF
56 DA11
55 DA10
54 DA9
53 DA8
52 DA7
51 DA6
50 OGND
49 OV
DD
A
INA+
1
A
INA–
2
REFHA 3
REFHA 4
REFLA 5
REFLA 6
V
DD
7
CLKA 8
CLKB 9
V
DD
10
REFLB 11
REFLB 12
REFHB 13
REFHB 14
A
INB–
15
A
INB+
16
65
48 DA5
47 DA4
46 DA3
45 DA2
44 DA1
43 DA0
42 NC
41 NC
40 CLKOUT
39 DB11
38 DB10
37 DB9
36 DB8
35 DB7
34 DB6
33 DB5
UP PACKAGE
64-LEAD (9mm
×
9mm) PLASTIC QFN
T
JMAX
= 150°C,
θ
JA
= 20°C/W
EXPOSED PAD (PIN 65) IS GND AND MUST BE SOLDERED TO PCB
Supply Voltage (V
DD
) ..................................................4V
Digital Output Ground Voltage (OGND) ........ –0.3V to 1V
Analog Input Voltage (Note 3) .......–0.3V to (V
DD
+ 0.3V)
Digital Input Voltage......................–0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation .............................................1500mW
Operating Temperature Range
LTC2283C ................................................ 0°C to 70°C
LTC2283I.............................................. –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
ORDER INFORMATION
LEAD FREE FINISH
LTC2283CUP#PBF
LTC2283IUP#PBF
LEAD BASED FINISH
LTC2283CUP
LTC2283IUP
TAPE AND REEL
LTC2283CUP#TRPBF
LTC2283IUP#TRPBF
TAPE AND REEL
LTC2283CUP#TR
LTC2283IUP#TR
PART MARKING*
LTC2283UP
LTC2283UP
PART MARKING*
LTC2283UP
LTC2283UP
PACKAGE DESCRIPTION
64-Lead (9mm × 9mm) Plastic QFN
64-Lead (9mm × 9mm) Plastic QFN
PACKAGE DESCRIPTION
64-Lead (9mm × 9mm) Plastic QFN
64-Lead (9mm × 9mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Gain Matching
Internal Reference
External Reference
External Reference
CONDITIONS
CONVERTER CHARACTERISTICS
The
l
denotes the specifications which apply over the full operating
MIN
●
GND 17
V
DD
18
SENSEB 19
VCMB 20
MUX 21
SHDNB 22
OEB
23
NC 24
NC 25
DB0 26
DB1 27
DB2 28
DB3 29
DB4 30
OGND 31
OV
DD
32
TYP
±0.4
±0.2
±2
±0.5
±10
±30
±5
±0.3
MAX
2
0.9
12
2.5
UNITS
Bits
LSB
LSB
mV
%FS
μV/°C
ppm/°C
ppm/°C
%FS
2283fb
12
–2
–0.9
–12
–2.5
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
●
●
●
●
2
LTC2283
CONVERTER CHARACTERISTICS
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
SENSE = 1V
PARAMETER
Offset Matching
Transition Noise
MIN
TYP
±2
0.32
MAX
UNITS
mV
LSB
RMS
ANALOG INPUT
SYMBOL
V
IN
V
IN,CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
PARAMETER
The
l
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.85V < V
DD
< 3.4V (Note 7)
Differential Input Drive (Note 7)
Single Ended Input Drive (Note 7)
0V < A
IN+
, A
IN–
< V
DD
0V < SENSEA, SENSEB < 1V
0V < MODE < V
DD
●
●
●
●
●
●
MIN
1
0.5
–1
–3
–3
TYP
±0.5V to ±1V
1.5
1.5
MAX
1.9
2
1
3
3
UNITS
V
V
V
μA
μA
μA
ns
ps
RMS
dB
MHz
Analog Input Range (A
IN+
–A
IN–
)
Analog Input Common Mode (A
IN+
+A
IN–
)/2
Analog Input Leakage Current
SENSEA, SENSEB Input Leakage
MODE Input Leakage Current
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
0
0.2
80
Figure 8 Test Circuit
640
DYNAMIC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input
30MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic
5MHz Input
30MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free Dynamic Range
4th Harmonic or Higher
5MHz Input
30MHz Input
70MHz Input
140MHz Input
S/(N+D)
Signal-to-Noise Plus Distortion Ratio
5MHz Input
30MHz Input
70MHz Input
140MHz Input
I
MD
Intermodulation Distortion
Crosstalk
f
IN
= 40MHz, 41MHz
f
IN
= 100MHz
●
●
●
●
MIN
TYP
70.2
70.1
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
68
70
69.6
88
85
70
82
78
90
90
77
90
90
69.8
69.7
67
69.6
69.5
85
–110
2283fb
3
LTC2283
INTERNAL REFERENCE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
2.85V < V
DD
< 3.4V
CONDITIONS
I
OUT
= 0
(Note 4)
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
Ω
|
I
OUT
|
< 1mA
DIGITAL INPUTS AND DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200μA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200μA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
OE
= High (Note 7)
V
OUT
= 0V
V
OUT
= 3V
I
O
= –10μA
I
O
= –200μA
I
O
= 10μA
I
O
= 1.6mA
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
CONDITIONS
V
DD
= 3V
V
DD
= 3V
V
IN
= 0V to V
DD
(Note 7)
LOGIC INPUTS (CLK,
OE,
SHDN, MUX)
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
●
●
TYP
MAX
UNITS
V
2
0.8
–10
3
10
V
μA
pF
3
50
50
●
●
pF
mA
mA
V
V
0.4
V
V
V
V
V
V
2.7
2.995
2.99
0.005
0.09
2.49
0.09
1.79
0.09
2283fb
4
LTC2283
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 8)
SYMBOL
V
DD
OV
DD
IV
DD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply Voltage
Output Supply Voltage
Supply Current
Power Dissipation
Shutdown Power (Each Channel)
Nap Mode Power (Each Channel)
CONDITIONS
(Note 9)
(Note 9)
Both ADCs at f
S(MAX)
Both ADCs at f
S(MAX)
SHDN = H,
OE
= H, No CLK
SHDN = H,
OE
= L, No CLK
●
●
●
●
POWER REQUIREMENTS
MIN
2.85
0.5
TYP
3
3
263
790
2
15
MAX
3.4
3.6
305
915
UNITS
V
V
mA
mW
mW
mW
TIMING CHARACTERISTICS
SYMBOL
f
s
t
L
t
H
t
AP
t
D
t
C
t
MD
PARAMETER
Sampling Frequency
CLK Low Time
CLK High Time
Sample-and-Hold Aperture Delay
CLK to DATA Delay
CLK to CLKOUT Delay
DATA to CLKOUT Skew
MUX to DATA Delay
Data Access Time After
OE↓
BUS Relinquish Time
Pipeline Latency
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
(Note 9)
Duty Cycle Stabilizer Off (Note 7)
Duty Cycle Stabilizer On (Note 7)
Duty Cycle Stabilizer Off (Note 7)
Duty Cycle Stabilizer On (Note 7)
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
(t
D
– t
C
) (Note 7)
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
(Note 7)
●
●
●
●
●
●
●
●
●
●
●
MIN
1
3.8
3
3.8
3
1.4
1.4
–0.6
1.4
TYP
4
4
4
4
0
2.7
2.7
0
2.7
4.3
3.3
5
MAX
125
500
500
500
500
5.4
5.4
0.6
5.4
10
8.5
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note
2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 125MHz, input range = 2V
P-P
with differential
drive, unless otherwise noted.
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 125MHz, input range = 1V
P-P
with differential
drive. The supply current and power dissipation are the sum total for both
channels with both channels active.
Note 9:
Recommended operating conditions.
2283fb
5
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LTC2283IUP#TR Related Products

LTC2283IUP#TR LTC2283CUP#TR
Description LTC2283 - Dual 12-Bit, 125Msps Low Power 3V ADC; Package: QFN; Pins: 64; Temperature Range: -40°C to 85°C LTC2283 - Dual 12-Bit, 125Msps Low Power 3V ADC; Package: QFN; Pins: 64; Temperature Range: 0°C to 70°C
Brand Name Linear Technology Linear Technology
Is it Rohs certified? incompatible incompatible
Maker Linear ( ADI ) Linear ( ADI )
Parts packaging code QFN QFN
package instruction VQCCN, LCC64,.35SQ,20 VQCCN, LCC64,.35SQ,20
Contacts 64 64
Manufacturer packaging code UP UP
Reach Compliance Code not_compliant _compli
ECCN code 3A991.C.2 3A991.C.2
Maximum analog input voltage 1 V 1 V
Minimum analog input voltage -1 V -1 V
Converter type ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD
JESD-30 code S-PQCC-N64 S-PQCC-N64
JESD-609 code e0 e0
length 9 mm 9 mm
Maximum linear error (EL) 0.0488% 0.0488%
Humidity sensitivity level 1 1
Number of analog input channels 1 1
Number of digits 12 12
Number of functions 2 2
Number of terminals 64 64
Maximum operating temperature 85 °C 70 °C
Output bit code OFFSET BINARY, 2\'S COMPLEMENT BINARY OFFSET BINARY, 2\'S COMPLEMENT BINARY
Output format PARALLEL, WORD PARALLEL, WORD
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code VQCCN VQCCN
Encapsulate equivalent code LCC64,.35SQ,20 LCC64,.35SQ,20
Package shape SQUARE SQUARE
Package form CHIP CARRIER, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 235 235
power supply 3 V 3 V
Certification status Not Qualified Not Qualified
Sampling rate 125 MHz 125 MHz
Sample and hold/Track and hold SAMPLE SAMPLE
Maximum seat height 0.8 mm 0.8 mm
Nominal supply voltage 3 V 3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 20 20
width 9 mm 9 mm

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