EBJ41RE4BAFA-AE-E datasheet, PDF

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EBJ41RE4BAFA-AE-E: DescriptionDDR DRAM Module, 512MX72, 0.3ns, CMOS, ROHS COMPLIANT, DIMM-240; Categorystorage storage; File Size229KB，23 Pages; ManufacturerELPIDA; Websitehttp://www.elpida.com/en; Environmental Compliance

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EBJ41RE4BAFA-AE-E Overview

DDR DRAM Module, 512MX72, 0.3ns, CMOS, ROHS COMPLIANT, DIMM-240

EBJ41RE4BAFA-AE-E Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	ELPIDA
Parts packaging code	DIMM
package instruction	DIMM, DIMM240,40
Contacts	240
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.3 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	533 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N240
JESD-609 code	e4
memory density	38654705664 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	240
word count	536870912 words
character code	512000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	512MX72
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM240,40
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.5 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum supply voltage (Vsup)	1.575 V
Minimum supply voltage (Vsup)	1.425 V
Nominal supply voltage (Vsup)	1.5 V
surface mount	NO
technology	CMOS
Temperature level	OTHER
Terminal form	NO LEAD
Terminal pitch	1 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

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PRELIMINARY DATA SHEET

4GB Registered DDR3 SDRAM DIMM

EBJ41RE4BAFA (512M words

72 bits, 2 Ranks)

Specifications

•

Density: 4GB

•

Organization



512M words

72 bits, 2 ranks

•

Mounting 36 pieces of 1G bits DDR3 SDRAM sealed

in FBGA

•

Package: 240-pin socket type dual in line memory

module (DIMM)



PCB height: 30.5mm (max.)



Lead pitch: 1.0mm



Lead-free (RoHS compliant)

•

Power supply: VDD

1.5V

0.075V

•

Data rate: 1333Mbps/1066Mbps/800Mbps (max.)

•

Eight internal banks for concurrent operation

(components)

•

Interface: SSTL_15

•

Burst lengths (BL): 8 and 4 with Burst Chop (BC)

•

/CAS Latency (CL): 5, 6, 7, 8, 9

•

/CAS write latency (CWL): 5, 6, 7

•

Precharge: auto precharge option for each burst

access

•

Refresh: auto-refresh, self-refresh

•

Refresh cycles



Average refresh period

7.8µs at 0°C

≤

≤ +85°C

3.9µs at

+85°C <

≤ +95°C

•

Operating case temperature range



TC = 0°C to +95°C

Features

•

Double-data-rate architecture; two data transfers per

clock cycle

•

The high-speed data transfer is realized by the 8 bits

prefetch pipelined architecture

•

Bi-directional differential data strobe (DQS and /DQS)

is transmitted/received with data for capturing data at

the receiver

•

DQS is edge-aligned with data for READs; center-

aligned with data for WRITEs

•

Differential clock inputs (CK and /CK)

•

DLL aligns DQ and DQS transitions with CK

transitions

•

Commands entered on each positive CK edge; data

and data mask referenced to both edges of DQS

•

Posted /CAS by programmable additive latency for

better command and data bus efficiency

•

On-Die-Termination (ODT) for better signal quality



Synchronous ODT



Dynamic ODT



Asynchronous ODT

•

Multi Purpose Register (MPR) for temperature read

out

•

ZQ calibration for DQ drive and ODT

•

Programmable Partial Array Self-Refresh (PASR)

•

/RESET pin for Power-up sequence and reset

function

•

SRT range:



Normal/extended



Auto/manual self-refresh

•

Programmable Output driver impedance control

•

1 piece of registering clock driver and 1 piece of

serial EEPROM (256 bytes EEPROM) for Presence

Detect (PD)

•

Class B temperature sensor functionality with

EEPROM

Document No. E1250E20 (Ver. 2.0)

Date Published March 2008 (K) Japan

Printed in Japan

URL: http://www.elpida.com

Elpida

Memory, Inc. 2007-2008

EBJ41RE4BAFA-AE-E Related Products

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Description	DDR DRAM Module, 512MX72, 0.3ns, CMOS, ROHS COMPLIANT, DIMM-240	DDR DRAM Module, 512MX72, 0.3ns, CMOS, ROHS COMPLIANT, DIMM-240	DDR DRAM Module, 512MX72, 0.255ns, CMOS, ROHS COMPLIANT, DIMM-240	DDR DRAM Module, 512MX72, 0.255ns, CMOS, ROHS COMPLIANT, DIMM-240	DDR DRAM Module, 512MX72, 0.4ns, CMOS, ROHS COMPLIANT, DIMM-240	DDR DRAM Module, 512MX72, 0.4ns, CMOS, ROHS COMPLIANT, DIMM-240
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to
Maker	ELPIDA	ELPIDA	ELPIDA	ELPIDA	ELPIDA	ELPIDA
Parts packaging code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
package instruction	DIMM, DIMM240,40	DIMM, DIMM240,40	DIMM, DIMM240,40	DIMM, DIMM240,40	DIMM, DIMM240,40	DIMM, DIMM240,40
Contacts	240	240	240	240	240	240
Reach Compliance Code	unknown	unknown	unknown	unknown	unknow	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Maximum access time	0.3 ns	0.3 ns	0.255 ns	0.255 ns	0.4 ns	0.4 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	533 MHz	533 MHz	667 MHz	667 MHz	400 MHz	400 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-XDMA-N240	R-XDMA-N240	R-XDMA-N240	R-XDMA-N240	R-XDMA-N240	R-XDMA-N240
JESD-609 code	e4	e4	e4	e4	e4	e4
memory density	38654705664 bit	38654705664 bit	38654705664 bit	38654705664 bit	38654705664 bi	38654705664 bi
Memory IC Type	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE
memory width	72	72	72	72	72	72
Number of functions	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1
Number of terminals	240	240	240	240	240	240
word count	536870912 words	536870912 words	536870912 words	536870912 words	536870912 words	536870912 words
character code	512000000	512000000	512000000	512000000	512000000	512000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
organize	512MX72	512MX72	512MX72	512MX72	512MX72	512MX72
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
Encapsulate equivalent code	DIMM240,40	DIMM240,40	DIMM240,40	DIMM240,40	DIMM240,40	DIMM240,40
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	1.5 V	1.5 V	1.5 V	1.5 V	1.5 V	1.5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	8192	8192	8192	8192	8192	8192
self refresh	YES	YES	YES	YES	YES	YES
Maximum supply voltage (Vsup)	1.575 V	1.575 V	1.575 V	1.575 V	1.575 V	1.575 V
Minimum supply voltage (Vsup)	1.425 V	1.425 V	1.425 V	1.425 V	1.425 V	1.425 V
Nominal supply voltage (Vsup)	1.5 V	1.5 V	1.5 V	1.5 V	1.5 V	1.5 V
surface mount	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED

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