Data Sheet
FEATURES
Low power, smallest pin-compatible, dual
nanoDAC
AD5663R:
16 bits
AD5643R:
14 bits
AD5623R:
12 bits
User-selectable external or internal reference
External reference default
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
10-lead MSOP and 3 mm × 3 mm LFCSP
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale
Per channel power-down
Serial interface up to 50 MHz
Hardware LDAC and CLR functions
Dual 12-/14-/16-Bit
nanoDAC
with
5 ppm/°C On-Chip Reference
AD5623R/AD5643R/AD5663R
FUNCTIONAL BLOCK DIAGRAM
V
DD
LDAC
INPUT
REGISTER
INTERFACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
BUFFER
V
OUT
B
DAC
REGISTER
STRING
DAC A
V
REFIN
/V
REFOUT
1.25V/2.5V
REFERENCE
BUFFER
V
OUT
A
SCLK
SYNC
DIN
AD5623R/AD5643R/AD5663R
POWER-ON
RESET
POWER-DOWN
LOGIC
05858-001
LDAC CLR
GND
Figure 1.
Table 1. Related Devices
Part No.
AD5663
Description
2.7 V to 5.5 V, dual 16-bit
nanoDAC,
with external
reference
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The
AD5623R/AD5643R/AD5663R,
members of the
nanoDAC®
family, are low power, dual 12-, 14-, and 16-bit buffered voltage-
out digital-to-analog converters (DAC) that operate from a single
2.7 V to 5.5 V supply and are guaranteed monotonic by design.
The
AD5623R/AD5643R/AD5663R
have an on-chip reference.
The
AD5623R-3/AD5643R-3/AD5663R-3
have a 1.25 V,
5 ppm/°C reference, giving a full-scale output of 2.5 V; and the
AD5623R-5/AD5643R-5/AD5663R-5
have a 2.5 V, 5 ppm/°C
reference, giving a full-scale output of 5 V. The on-chip
reference is off at power-up, allowing the use of an external
reference; and all devices can be operated from a single 2.7 V to
5.5 V supply. The internal reference is turned on by writing to
the DAC.
The parts incorporate a power-on reset circuit that ensures the
DAC output powers up to 0 V and remains there until a valid
write takes place. The part contains a power-down feature that
reduces the current consumption of the device to 480 nA at 5 V
and provides software-selectable output loads while in power-
down mode.
Rev. G
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The low power consumption of this part in normal operation
makes it ideally suited to portable, battery-operated equipment.
The
AD5623R/AD5643R/AD5663R
use a versatile, 3-wire serial
interface that operates at clock rates up to 50 MHz, and they are
compatible with standard SPI®, QSPI™, MICROWIRE™, and
DSP interface standards. The on-chip precision output amplifier
enables rail-to-rail output swing to be achieved.
PRODUCT HIGHLIGHTS
1. Dual 12-, 14-, and 16-bit DAC.
2. On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
3. Available in 10-lead MSOP and 10-lead, 3 mm ×
3 mm LFCSP.
4. Low power; typically consumes 0.6 mW at 3 V and
1.25 mW at 5 V.
5. 4.5 μs maximum settling time for the
AD5623R.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
AD5623R/AD5643R/AD5663R
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
AD5623R-5/AD5643R-5/AD5663R-5 ....................................... 4
AD5623R-3/AD5643R-3/AD5663R-3 ....................................... 6
AC Characteristics........................................................................ 7
Timing Characteristics ................................................................ 8
Timing Diagram ........................................................................... 8
Absolute Maximum Ratings............................................................ 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 11
Terminology .................................................................................... 19
Theory of Operation ...................................................................... 21
Digital-to-Analog Section ......................................................... 21
Resistor String ............................................................................. 21
Data Sheet
Output Amplifier........................................................................ 21
Internal Reference ...................................................................... 21
External Reference ..................................................................... 21
Serial Interface ............................................................................ 21
Input Shift Register .................................................................... 22
SYNC Interrupt .......................................................................... 22
Power-On Reset .......................................................................... 23
Software Reset ............................................................................. 23
Power-Down Modes .................................................................. 23
LDAC Function .......................................................................... 24
Internal Reference Setup ........................................................... 25
Microprocessor Interfacing ....................................................... 26
Applications Information .............................................................. 27
Using a Reference as a Power Supply ....................................... 27
Bipolar Operation Using the AD5663R ................................... 27
Using the AD5663R with a Galvanically Isolated Interface .. 27
Power Supply Bypassing and Grounding ................................ 28
Outline Dimensions ....................................................................... 29
Ordering Guide .......................................................................... 30
Rev. G | Page 2 of 32
Data Sheet
REVISION HISTORY
9/15—Rev. F to Rev. G
Change to Figure 38 ........................................................................16
Changes to Software Reset Section ...............................................23
Changes to AD5623R/AD5643R/AD5663R to Blackfin®
Microprocessors Interface Section and Figure 56.......................26
Changes to Using the Reference as a Power Supply Section .....27
Updated Outline Dimensions ........................................................29
2/13—Rev. E to Rev. F
Changes to Table 14 ........................................................................23
4/12—Rev. D to Rev. E
Changes to Table 2 ............................................................................ 3
Updated Outline Dimensions ........................................................28
Changes to Ordering Guide ...........................................................29
AD5623R/AD5643R/AD5663R
4/11—Rev. C to Rev. D
Changes to Ordering Guide ........................................................... 29
6/10—Rev. B to Rev. C
Changes to Ordering Guide ........................................................... 28
4/10—Rev. A to Rev. B
Updated Outline Dimensions........................................................ 28
12/06—Rev. 0 to Rev. A
Changes to Table 2 ............................................................................ 3
Changes to Table 3 ............................................................................ 5
Changes to Figure 3 .......................................................................... 9
Changes to Ordering Guide ........................................................... 28
4/06—Revision 0: Initial Version
Rev. G | Page 3 of 32
AD5623R/AD5643R/AD5663R
SPECIFICATIONS
AD5623R-5/AD5643R-5/AD5663R-5
Data Sheet
V
DD
= 4.5 V to 5.5 V; R
L
= 2 kΩ to GND; C
L
= 200 pF to GND; V
REFIN
= V
DD
; all specifications T
MIN
to T
MAX,
unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE
2
AD5663R
Resolution
Relative Accuracy
Differential Nonlinearity
AD5643R
Resolution
Relative Accuracy
Differential Nonlinearity
AD5623R
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Scale Error
Offset Error
Full-Scale Error
Gain Error
Zero-Scale Error Drift
Gain Temperature Coefficient
DC Power Supply Rejection Ratio
DC Crosstalk (External Reference)
±2
±2.5
−100
10
10
5
25
20
10
OUTPUT CHARACTERISTICS
3
Output Voltage Range
Capacitive Load Stability
DC Output Impedance
Short-Circuit Current
Power-Up Time
REFERENCE INPUTS
Reference Current
Reference Input Range
Reference Input Impedance
0
2
10
0.5
30
4
V
DD
0
2
10
0.5
30
4
A Grade
1
Min
Typ
Max
Min
B Grade
1
Typ
Max
Unit
Conditions/Comments
16
±8
±16
±1
Bits
LSB
LSB
Bits
LSB
LSB
Bits
LSB
LSB
mV
mV
% of
FSR
% of
FSR
µV/°C
ppm
dB
µV
µV/mA
µV
µV
µV/mA
µV
Guaranteed monotonic by design
14
±2
±4
±0.5
Guaranteed monotonic by design
12
±1
+2
±1
−0.1
±2
±1
+10
±10
±1
±1.5
±2
±2.5
−100
10
10
5
25
20
10
V
DD
±0.5
+2
±1
−0.1
±1
±0.25
+10
±10
±1
±1.5
Guaranteed monotonic by design
All 0s loaded to DAC register
All 1s loaded to DAC register
DC Crosstalk (Internal Reference)
Of FSR/°C
DAC code = midscale ; V
DD
= 5 V ±
10%
Due to full-scale output change;
R
L
= 2 kΩ to GND or V
DD
Due to load current change
Due to powering down (per channel)
Due to full-scale output change;
R
L
= 2 kΩ to GND or V
DD
Due to load current change
Due to powering down (per channel)
V
nF
nF
Ω
mA
μs
R
L
= ∞
R
L
= 2 kΩ
V
DD
= 5 V
Coming out of power-down mode;
V
DD
= 5 V
V
REF
= V
DD
= 5.5 V
170
0.75
26
200
V
DD
170
0.75
26
200
V
DD
µA
V
kΩ
Rev. G | Page 4 of 32
Data Sheet
Parameter
REFERENCE OUTPUT
Output Voltage
Reference Temperature Coefficient
3
Output Impedance
LOGIC INPUTS
3
Input Current
Input Low Voltage (V
INL
)
Input High Voltage (V
INH
)
Pin Capacitance
POWER REQUIREMENTS
V
DD
I
DD
(Normal Mode)
4
V
DD
= 4.5 V to 5.5 V
V
DD
= 4.5 V to 5.5 V
I
DD
(All Power-Down Modes)
5
V
DD
= 4.5 V to 5.5 V
1
2
AD5623R/AD5643R/AD5663R
A Grade
1
Min
Typ
Max
2.495
±10
±10
7.5
±2
0.8
2
3
19
4.5
0.25
0.8
0.48
5.5
0.45
1
1
4.5
0.25
0.8
0.48
2
3
19
5.5
0.45
1
1
2.505
Min
2.495
±5
±10
7.5
B Grade
1
Typ
Max
2.505
±10
Unit
V
ppm/°C
ppm/°C
kΩ
µA
V
V
pF
pF
V
mA
mA
µA
V
IH
= V
DD
and V
IL
= GND
Internal reference off
Internal reference on
V
IH
= V
DD
and V
IL
= GND
Conditions/Comments
At ambient
MSOP package models
LFCSP package models
±2
0.8
All digital inputs
V
DD
= 5 V
V
DD
= 5 V
DIN, SCLK, and SYNC
LDAC and CLR
Temperature range: A, B grade = −40°C to +105°C.
Linearity calculated using a reduced code range:
AD5663R
(Code 512 to Code 65,024),
AD5643R
(Code 128 to Code 16,256), and
AD5623R
(Code 32 to Code 4064).
Output unloaded.
3
Guaranteed by design and characterization, not production tested.
4
Interface inactive. All DACs active. DAC outputs unloaded.
5
Both DACs powered down.
Rev. G | Page 5 of 32
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