Polyphase Multifunction
Energy Metering IC with Serial Port
ADE7754
*
FEATURES
High Accuracy, Supports IEC 687/61036
Compatible with 3-Phase/3-Wire, 3-Phase/4-Wire
and any Type of 3-Phase Services
Less than 0.1% Error in Active Power Measurement over a
Dynamic Range of 1000 to 1
Supplies Active Energy, Apparent Energy, Voltage RMS,
Current RMS, and Sampled Waveform Data
Digital Power, Phase, and Input Offset Calibration
On-Chip Temperature Sensor ( 4 C Typical after Calibration)
On-Chip User Programmable Thresholds for Line Voltage
SAG and Overdrive Detections
SPI Compatible Serial Interface with Interrupt
Request Line (IRQ)
Pulse Output with Programmable Frequency
Proprietary ADCs and DSP Provide High Accuracy over
Large Variations in Environmental Conditions and Time
Single 5 V Supply
GENERAL DESCRIPTION
the use of the ADE7754 in various power meter services such as
3-phase/4-wire, 3-phase/3-wire, and 4-wire delta.
In addition to rms calculation, active and apparent power infor-
mation, the ADE7754 provides system calibration features for
each phase (i.e., channel offset correction, phase calibration,
and gain calibration). The CF logic output provides instanta-
neous active power information.
The ADE7754 has a waveform sample register that enables
access to ADC outputs. The part also incorporates a detection
circuit for short duration low or high voltage variations. The
voltage threshold levels and the duration (number of half line
cycles) of the variation are user programmable.
A zero-crossing detection is synchronized with the zero-crossing
point of the line voltage of each of the three phases. The infor-
mation collected is used to measure each line’s period. It is also
used internally to the chip in the line active energy and line
apparent energy accumulation modes. This permits faster and
more accurate calibration of the power calculations. This signal
is also useful for synchronization of relay switching.
Data is read from the ADE7754 via the SPI serial interface. The
interrupt request output (IRQ) is an open-drain, active low
logic output. The
IRQ
output goes active low when one or more
interrupt events have occurred in the ADE7754. A status regis-
ter indicates the nature of the interrupt.
The ADE7754 is available in a 24-lead SOIC package.
The ADE7754 is a high accuracy polyphase electrical energy
measurement IC with a serial interface and a pulse output. The
ADE7754 incorporates second order
Σ-∆
ADCs, reference
circuitry, temperature sensor, and all the signal processing
required to perform active, apparent energy measurements, and
rms calculation.
The ADE7754 provides different solutions for measuring active
and apparent energy from the six analog inputs, thus enabling
FUNCTIONAL BLOCK DIAGRAM
RESET
AVGAIN
AVRMSOS
AV
DD
X
2
PGA1
I
AP
I
AN
V
AP
PGA2
ADC
APHCAL
BVGAIN
AIRMSOS
AAPGAIN
HPF
AVAG
ADE7754
POWER SUPPLY
MONITOR
X
2
LPF2
AAPOS
BVRMSOS
AWG
|X|
ADC
ABS
X
2
PGA1
I
BP
I
BN
V
BP
ADC
PGA2
ADC
BPHCAL
CVGAIN
BIRMSOS
BAPGAIN
HPF
BVAG
CFNUM
X
2
LPF2
BAPOS
CVRMSOS
BWG
|X|
DFC
CF
ABS
CFDEN
X
2
PGA1
I
CP
I
CN
V
CP
V
N
2.4V REF
AGND
REF
IN/OUT
PGA2
ADC
4k
CPHCAL
CIRMSOS
CAPGAIN
HPF
CVAG
DV
DD
DGND
CLKIN
CLKOUT
X
2
LPF2
CAPOS
CWG
|X|
ADC
%
WDIV
%
VADIV
ABS
TEMP
SENSOR
ADC
ADE7754 REGISTERS AND
SERIAL INTERFACE
DIN DOUT SCLK
CS
IRQ
REV. 0
*Patents
pending.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
ADE7754
Contents
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . 1
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
TIMING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . 4
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . 5
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
PIN CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . . 5
TYPICAL PERFORMANCE CHARACTERISTICS . . . . . 7
TERMINOLOGY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Measurement Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Phase Error Between Channels . . . . . . . . . . . . . . . . . . . . . 9
Power Supply Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
ADC Offset Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Gain Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Gain Error Match . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
POWER SUPPLY MONITOR . . . . . . . . . . . . . . . . . . . . . . . 9
ANALOG INPUTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
ANALOG-TO-DIGITAL CONVERSION . . . . . . . . . . . . . 10
Antialias Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CURRENT CHANNEL ADC . . . . . . . . . . . . . . . . . . . . . . 11
Current Channel ADC Gain Adjust . . . . . . . . . . . . . . . . . 11
Current Channel Sampling . . . . . . . . . . . . . . . . . . . . . . . 11
VOLTAGE CHANNEL ADC . . . . . . . . . . . . . . . . . . . . . . 12
ZERO-CROSSING DETECTION . . . . . . . . . . . . . . . . . . . 12
Zero-Crossing Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . 13
PERIOD MEASUREMENT . . . . . . . . . . . . . . . . . . . . . . . 13
LINE VOLTAGE SAG DETECTION . . . . . . . . . . . . . . . . 13
PEAK DETECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Peak Level Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
TEMPERATURE MEASUREMENT . . . . . . . . . . . . . . . . 14
PHASE COMPENSATION . . . . . . . . . . . . . . . . . . . . . . . . 14
ROOT MEAN SQUARE MEASUREMENT . . . . . . . . . . . 15
Current RMS Calculation . . . . . . . . . . . . . . . . . . . . . . . . 15
Current RMS Gain Adjust . . . . . . . . . . . . . . . . . . . . . . 16
Current RMS Offset Compensation . . . . . . . . . . . . . . . 16
Voltage RMS Calculation . . . . . . . . . . . . . . . . . . . . . . . . . 16
Voltage RMS Gain Adjust . . . . . . . . . . . . . . . . . . . . . . 16
Voltage RMS Offset Compensation . . . . . . . . . . . . . . . 17
ACTIVE POWER CALCULATION . . . . . . . . . . . . . . . . . 17
Power Offset Calibration . . . . . . . . . . . . . . . . . . . . . . . . . 18
Reverse Power Information . . . . . . . . . . . . . . . . . . . . . . . 18
TOTAL ACTIVE POWER CALCULATION . . . . . . . . . . 18
ENERGY CALCULATION . . . . . . . . . . . . . . . . . . . . . . . . 19
Integration Times Under Steady Load . . . . . . . . . . . . . . . 20
Energy to Frequency Conversion . . . . . . . . . . . . . . . . . . . 20
No Load Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Mode Selection of the Sum of the Three Active Energies . 22
LINE ENERGY ACCUMULATION . . . . . . . . . . . . . . . . . 22
REACTIVE POWER CALCULATION . . . . . . . . . . . . . . . 23
TOTAL REACTIVE POWER CALCULATION . . . . . . . . 24
Reactive Energy Accumulation Selection . . . . . . . . . . . . . 24
APPARENT POWER CALCULATION . . . . . . . . . . . . . . 24
Apparent Power Offset Calibration . . . . . . . . . . . . . . . . . 25
TOTAL APPARENT POWER CALCULATION . . . . . . . 25
APPARENT ENERGY CALCULATION . . . . . . . . . . . . . 26
Integration Times under Steady Load . . . . . . . . . . . . . . . 26
LINE APPARENT ENERGY ACCUMULATION . . . . . . 26
ENERGIES SCALING . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CHECK SUM REGISTER . . . . . . . . . . . . . . . . . . . . . . . . .
SERIAL INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Serial Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . .
Serial Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . .
INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using Interrupts with an MCU . . . . . . . . . . . . . . . . . . . .
Interrupt Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ACCESSING THE ADE7754 ON-CHIP REGISTERS . .
Communications Register . . . . . . . . . . . . . . . . . . . . . . . .
Operational Mode Register (0Ah) . . . . . . . . . . . . . . . . . .
Gain Register (18h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CFNUM Register (25h) . . . . . . . . . . . . . . . . . . . . . . . . . .
Measurement Mode Register (0Bh) . . . . . . . . . . . . . . . . .
Waveform Mode Register (0Ch) . . . . . . . . . . . . . . . . . . .
Watt Mode Register (0Dh) . . . . . . . . . . . . . . . . . . . . . . .
VA Mode Register (0Eh) . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Enable Register(0Fh) . . . . . . . . . . . . . . . . . . . .
Interrupt Status Register (10h)/Reset Interrupt Status
Register (11h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . .
27
27
28
28
29
30
30
30
31
31
35
36
36
37
37
38
38
39
40
41
–2–
REV. 0
ADE7754–SPECIFICATIONS
Parameters
ACCURACY
Active Power Measurement Error
Phase Error between Channels
(PF = 0.8 Capacitive)
(PF = 0.5 Inductive)
AC Power Supply Rejection
1
Output Frequency Variation
DC Power Supply Rejection
1
Output Frequency Variation
Active Power Measurement Bandwidth
V
rms
Measurement Error
V
rms
Measurement Bandwidth
I
rms
Measurement Error
I
rms
Measurement Bandwidth
ANALOG INPUTS
Maximum Signal Levels
Input Impedance (DC)
Bandwidth (–3 dB)
ADC Offset Error
1
Gain Error
1
Gain Error Match
1
REFERENCE INPUT
REF
IN/OUT
Input Voltage Range
Input Impedance
Input Capacitance
TEMPERATURE SENSOR
ON-CHIP REFERENCE
Reference Error
Temperature Coefficient
CLKIN
Input Clock Frequency
LOGIC INPUTS
RESET,
DIN, SCLK, CLKIN, and
CS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN
LOGIC OUTPUTS
CF, IRQ, DOUT, and CLKOUT
Output High Voltage, V
OH
Output Low Voltage, V
OL
POWER SUPPLY
AV
DD
DV
DD
AI
DD
DI
DD
Spec
0.1
±
0.05
±
0.05
0.01
0.01
14
0.5
260
2
14
±
500
370
14
25
±
8
±
3
2.6
2.2
3.7
10
±
4
±
200
30
10
(AV
DD
= DV
DD
= 5 V 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 10 MHz,
T
MIN
to T
MAX
= –40 C to +85 C, unless otherwise noted.)
Unit
% typ
º max
º max
% typ
% typ
kHz typ
% typ
Hz typ
% typ
kHz
mV peak max
kΩ min
kHz typ
mV max
% typ
% typ
V max
V min
k max
pF max
ºC
mV max
ppm/ºC typ
MHz typ
Test Conditions/Comments
Over a dynamic range 1000 to 1
Phase lead 37º
Phase lag 60º
IAP/N = IBP/N = ICP/N =
±
100 mV rms
IAP/N = IBP/N = ICP/N =
±
100 mV rms
Over dynamic range of 20 to 1
Over dynamic range of 100 to 1
Differential input: V
AP
–V
N
, V
BP
–V
N
, V
CP
–V
N
,
I
AP
–I
AN
, I
BP
–I
BN
, I
CP
–I
CN
Uncalibrated error; See Terminology for details.
External 2.5 V reference
External 2.5 V reference
2.4 V + 8%
2.4 V – 8%
Calibrated dc offset
2.4
0.8
±
3
10
V min
V max
A max
pF max
DV
DD
= 5 V
±
5%
DV
DD
= 5 V
±
5%
Typical 10 nA, V
IN
= 0 V to DV
DD
4
1
4.75
5.25
4.75
5.25
7
18
V min
V max
V min
V max
V min
V max
mA max
mA max
DV
DD
= 5 V
±
5%
DV
DD
= 5 V
±
5%
For specified performance
5 V – 5%
5 V + 5%
5 V – 5%
5 V + 5%
At 5.25 V
At 5.25 V
NOTES
1
See Terminology section for explanation of specifications.
2
See plots in the Typical Performance Characteristics section.
Specifications subject to change without notice.
REV. 0
–3–
ADE7754
TIMING CHARACTERISTICS
Parameter
Write Timing
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
Read Timing
t
9 3
t
10
t
114
t
125
t
135
Spec
50
50
50
10
5
400
50
100
4
50
30
100
10
100
10
1, 2
(AV
DD
= DV
DD
= 5 V
5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 10 MHz XTAL,
T
MIN
to T
MAX
= –40 C to +85 C, unless otherwise noted.)
Test Conditions/Comments
CS
Falling Edge to First SCLK Falling Edge
SCLK Logic High Pulsewidth
SCLK Logic Low Pulsewidth
Valid Data Setup Time before Falling Edge of SCLK
Data Hold Time after SCLK Falling Edge
Minimum Time between the End of Data Byte Transfers
Minimum Time between Byte Transfers during a Serial Write
CS
Hold Time after SCLK Falling Edge
Minimum Time between Read Command (i.e., a Write to Communication
Register) and Data Read
Minimum Time between Data Byte Transfers during a Multibyte Read
Data Access Time after SCLK Rising Edge following a Write to the
Communications Register
Bus Relinquish Time after Falling Edge of SCLK
Bus Relinquish Time after Rising Edge of
CS
Unit
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
µs
(min)
ns (min)
ns (min)
ns (max)
ns (min)
ns (max)
ns (min)
NOTES
1
Sample tested during initial release and after any redesign or process change
that may affect this parameter. All input signals are specified with tr = tf = 5 ns
(10% to 90%) and timed from a voltage level of 1.6 V.
2
See timing diagrams below and Serial Interface section of this data sheet.
3
Minimum time between read command and data read for all registers except
wavmode register, which is t
9
= 500 ns min.
4
Measured with the load circuit in Figure 1 and defined as the time required for
the output to cross 0.8 V or 2.4 V.
5
Derived from the measured time taken by the data outputs to change 0.5 V
when loaded with the circuit in Figure 1. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF
capacitor. The time quoted in the timing characteristics is the true bus relin-
quish time of the part and is independent of the bus loading.
200 A
TO
OUTPUT
PIN
I
OL
2.1V
C
L
50pF
1.6mA
I
OH
Figure 1. Load Circuit for Timing Specifications
t
8
CS
t
1
SCLK
t
2
t
3
t
7
t
4
t
5
A3
A2
A1
A0
DB7
DB0
DB7
t
6
t
7
DIN
1
0
A5
A4
DB0
COMMAND BYTE
MOST SIGNIFICANT BYTE
LEAST SIGNIFICANT BYTE
Figure 2. Serial Write Timing
CS
t
1
t
9
SCLK
t
10
DIN
0
0
A5
A4
A3
A2
A1
A0
t
11
DOUT
COMMAND BYTE
DB7
t
12
DB0
DB7
t
13
DB0
MOST SIGNIFICANT BYTE
LEAST SIGNIFICANT BYTE
Figure 3. Serial Read Timing
–4–
REV. 0
ADE7754
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C, unless otherwise noted.)
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to AV
DD
. . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Analog Input Voltage to AGND
I
AP
, I
AN
, I
BP
, I
BN
, I
CP
, I
CN
, V
AP
, V
BP
, V
CP
, V
N
. . –6 V to +6 V
Reference Input Voltage to AGND . –0.3 V to AV
DD
+ 0.3 V
Digital Input Voltage to DGND . . . –0.3 V to DV
DD
+ 0.3 V
Digital Output Voltage to DGND . . –0.3 V to DV
DD
+ 0.3 V
Operating Temperature Range
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
24-Lead SOIC, Power Dissipation . . . . . . . . . . . . . . . 88 mW
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . 53°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
ADE7754AR
ADE7754ARRL
EVAL-ADE7754EB
Package Description
24-Lead SOIC
24-Lead SOIC
Package Option*
RW-24
RW-24 in Reel
ADE7754 Evaluation Board
*RW
= Small Outline (Wide Body Package in Tubes)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADE7754 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
CF
1
DGND
2
DV
DD 3
AV
DD 4
I
AP 5
I
AN 6
I
BN 8
I
CP 9
I
CN 10
AGND
11
REF
IN/OUT 12
24
DOUT
23
SCLK
22
DIN
21
CS
ADE7754
20
CLKOUT
TOP VIEW
19
CLKIN
(Not to Scale)
18
IRQ
I
BP 7
17
RESET
16
V
AP
15
V
BP
14
V
CP
13
V
N
PIN FUNCTION DESCRIPTIONS
Pin No.
1
Mnemonic
CF
Description
Calibration Frequency Logic Output. This pin provides active power information. This output
is intended to be used for operational and calibration purposes. The full-scale output frequency
can be scaled by writing to the CFNUM and CFDEN registers. See the Energy to Frequency
Conversion section.
This pin provides the ground reference for the digital circuitry in the ADE7754 (i.e. multiplier, filters,
and a digital-to-frequency converter). Because the digital return currents in the ADE7754 are small,
this pin can be connected to the analog ground plane of the whole system. However high bus
capacitance on the DOUT pin may result in noisy digital current, which could affect performance.
2
DGND
REV. 0
–5–
Industrial Control Electronics
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