ANALOGDEVICES fAX-ON-DEMAND HOTLINE
-
Page
111
ANALOG
W DEVICES
I
HighPowerOutput" ybrid
H
Digital-o-Synchro/Resolver
t
Converters
DRC1M~DRC1746
I
OBS
FEATURES
14- or 16-Bit Resolution
2 or 4 Arc-Minutes Accuracy
2VA max Mean Output Drive Capability
Full Accuracy for de to 2.6kHz Reference
Full Accuracy with dc or Pulsating Power
Supplies (PPS)
Guaranteed Operation With 3V dc Pedestal on PPS
Can Drive Pure Inductive, Resistive or Highly
Capacitive Loads
LS or CMOS Latched Inputs With Separate HighlLow
Byte Enable
Low Radius Vector Variation (0.03%)
Optional TransZorb TMProtection Against
Inductive Spikes on Output
Protected Against +200% Overvoitage on
Analog Input
Remote Output Sensing Facility
No Trims or External Adjustments
Full Output Short Circuit Protection
Single 4O-Pin Package
Hi Rei, MIL-STDB83BVersions Available
APPUCA
TIONS
Driving Synchro and Resolver Control Transformers
Avionic Equipment (e.g., Air Data Computers)
Interfacing With Servo Systems
Fire Control System Outputs
Naval Retransmission Unit Outputs
Outputs to Radars and Navigational Aids
Aircraft and Naval Simulators
GENERAL DESCRIPTION
The DRCl745 and DRC1746are hybrid packaged Digital-to-
Resolverconverters.They accept a 14-bit or 16-bitdigital input
word representingangleand output sine and cosinevoltages
multipliedby an analoginput. The convertersmaintain full
accuracywhen the analog input frequencyis in the range dc to
2.6kHz.
FUNCTIONAL
,-,sv
BLOCK DIAGRAM
-1SV
+15VIP,
SIN
SENSE
SIN
1M SIN ",t SIN "'
SIG GNP
cDS SENSE
A_,
COS
{2A SIN ",t COS "'
fA SIN ,.Ii
V"'
A,o
,sv
IL OPTIONS
ONLYI
OLE
TE
LBE
HBE
"'GITI"
INPUT
(to'
"SIG
GNO
-15VIP!
NOTE,
"A",",
"GNO", AND
IN STAR POINT.
GND"
ARE INTERNALLY
cONNECTED
The useof
pulsating power suppliesgreatly reduces the internal
power dissipation in the hybrid package which in tUrn maximizes
the converter's Mean
Time
BetWeen
Failures (MTBF).
A particular feature of the converters is that they have a remote
sensing facility which means that output accuracy can be main-
tained even when long lines have to be driven.
The converter's data inputs are latched and the latches can be
CMOS or Low Power Schottky (LS). The former gives advantages
in terms of power dissipation and the latter in terms of glitch
performance when used in fast dynamic update modes. The
latches
are transparent and have a separatehigh and low byte
enable.
As an option, the output stage can be fitted with internal Trans-
Zorb TMprotection. This gives full protection against transient
voltages generated by an inductive load in response to an abrupt
change in load current. This condition can occur at switch off
or as a consequence of external power supply fault conditions.
The units are packaged in 4O-pin dual in line hybrid packages
and require no external trims or adjustments.
MODELS AVAILABLE
The DRC1745 (14-bit resolution) and DRC1746 (l6-bit resolution)
are available with accuracies of :!:2 or :t 4 arc-minUtes. Both
units have optional TransZorb protection and a choice of either
LS or CMOS inputs (see Ordering Information).
Two sets of reference and output transformers are available.
The STMl660/STM1663 operates over 47Hz to 440Hz while
the STM1680/STM1683 operates over 360Hz to 2.6kHz. The
transformers can be Scott T connected to provide a synchro
oUtput format.
The units have internal power amplifiers capable of driving a
2VA load which can be pure inductive, resistive or highly capaci-
tive. The output is fully short-circuit protected against overcurrenr.
The output of the converter can be used to drive directly into
resolver control tnmsformers or in conjunction with an external
transformer module to drive synchro control transformers. The
power available is more than adequate to drive aU standard
synchro control transformers.
The separately powered output stage is compatible with conven-
tional :t 15V dc power supplies or pulsating'power supplies with
pedestal components as low as 3V dc.
TrausZorb
lDduatries,
ia a reJ:istercd trademark
Inc.
of General
Semicoadui:tOr
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However. no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P,O, Box 9106, Norwood, MA 02062-9106. U.S.A.
Tel: 617/329.4700
Fax: 617/326.8703
Twx; 710/394-6577
Telex: 924491
Cable: ANALOG
NORWOODMASS
~~
ANALOGDEVICES fAX-ON-DEHAND HOTLINE
-
Page
11
ORC
1745/DRC1746 SPECIFICATIONS
-
~~~~:s;n;::)oc
M.ocIcIo
DIGITALINPUTRESOLUTION
DIGITALINPUTFORMAT
RECOMMENDED
ANALOGINPUT
(V"",,)'
OUTPUT WITH RECOMMENDED
and:t15V
power upplies,
s
unless
Itcfcn:ac:.I_'
Tl'IUUIf-r
STMI
II.S.26.IJSVrnJs
depcndins Of)option
Output
TraaalonDCr
DRC1745
148ito(1.32arc-minutes)
Panllel naruralbinary.TIL compatible.
Include<
intcmaJ271<.0
pull.uprcwton.
3AVnn. (.in&kcndedinput)
3.S3Vnns(max)
6.SVnns
ORC!1"
16Bi,.
(O.Hare-minu,..)
.
.
'
Model
INPUTVOLTAGE
OlJTPUTVOl.TAGF.5
OlITPUT FORMAT
STMI68:J
6.8V"""
Sin.eos
11.8,26,!IOVrms"'S%
SI,S2,S3,(S4)
Synebroorraolver
d<pOO<tingn oprion
o
R.n,
RLO
N/A
3.4VrnJS
'"
1%
AKhAU)
ANALOGINPUT
GAIN(VR.F,oVo)
GAINTEMPERATURE
COEFFIClEh'T
ANALOGINPUT(V.E")
FREQlJENCYRANGE
ANALOGINPUTIMPEDANCE
ANALOGOlITPUTIMPEDANCE
1.01Vnm(max)
.
2 "'°.1%
2Sppmrc (mn)
dcto 2.6kR.
IO.llefi
.
.
.
.
.
O.2mOmax
2SmV(max)
OBS
50,.VI'C(max)
1.5VA(max_n)
:t 300mA_kii<' IO.6Vpcsk
PHASESHIFT(V.BFtoVO)
OUTPUTPROTECTION
Ov.rvoltasc
OverclUrcnl
O.OS'@IOOHz
OUTPUTOFFSETVOLTAGE
OUTPUTOFFSETVOLTAGEDRIFT
OUTPUTDRIVECAPABILITY
.
.
.
.
FREQUENCY
RANGE
STMI6S0
STMI683
INPUT IMPEDANCE
I l.8VInput
26Vlnput
JIV Input
ACCURACY
O.IVA Load
360H:o-2.6kHz
36OH:o-2.6kH.
SOM}{min)
30i<0{min)
800kfl(min)
N/A
NIA
NIA
NIA
NiA
N/A
N/A
IOOOV
1.12 x 1.12" 0.4"
(28.5 x
28.5
x 1O.2mm)
N/A
NiA
N/A
'" LOue-min(max)
:r 2.0 arc-miD (max)
L4VALoad
l.OVA Load
Tcmperatun:Cocff>eicnl
OUTPUTIMPEDANCE
z3.0are-min(max)
'"O.Olarc-minrC(max)
2.9f1(typ)
13.6(I(typ)
lS6fl(typ)
IOOOV
26V
Output
!IOVOutput
11.8 V Output
Tnon.Zorb(optional)
:: 1ZV"...dff, '" 15V
cLamp
Limit ..t@)55OmApeak. (Ca.. beader
must be main..;ncd (ii; 12S'C nux).
RESPONSE TO A STEP INPUT
VECTOR ACCURACY
Radius Error
ZOILS
(mu) to within """u,,"e)' of c<>nvcn«.
Any size digital...p input.
().()3%
AngWarError
POWERSUPPLY
(NO LOAD)"'"
+ ISVolt<
LSutcllOpti"",
:;;2or :t4arc-minu,cs
- 15
Vol"
+5 Volts
+ 15Vol",
ISmA(ryp)22mA(mu)
ISmA(typ)22mA(mu)
+ I5(P)Volts
-15(P)VoIu
CMOSl.atcbOpti"",
20mA(ryp) 34mA(mox)
20mA(typ)34mA(max)
44mA (IYP) 12mA (max)
-ISVol..
+ IS(P)VoIl$
U(P) Volts
14mA (typ) 3OmA(ma:x)
ISmA (typ) 22mA (max)
Additional urrent
C
(lDad Dependent)
-
lOmA(typ)34mA(max)
20mA(ryp)34mA(max)
4OOmAPeak(max)
+ I5(P)Vol"
-15(P)VoIts
PULSATINGPOWERSUPPLY
PEDESTAL
POWERDISSIPATION
CASE
TEMPERATURE
RANGE'
SIZE
WEIGHT
NOTES
'v." is In-If
400mAPcak(max)
]Vde(min)
SeePowerI)jssipo.tioncctin ofIhisdaluheet.
.
s
- 55"Clo+ 125"COperaling
- 6S"C to + I SO"C Storase
OLE
TE
'
'
STMI683
.
.
.
DCISOLATION
VoItJlS"
SIZE
STMI680
2.25><112><0.4"
(57.1 "'28.5>< IO.2mm)
TEMPERATURE RANGE
Operating
STMI680
.
.
.
.
.
.
.
.
.
.
.
Storasc
STMI683
--S5"Cto+125"C
-60"Cto ...150"C
-S5"Cto + 12S'C
- 6O"Ct ... 15O"C
WEIGHT(mu)
1.5 oz (41 grams)
1. So;z(70 grams)
IOtA man,
nol appi;abje.
.
4O-Pin
DlL 1.14.,,2.14xO.IS"
(19.0)( 54.4 X4.6"",,)
0.9 o;z(25 gram.)
<-pod to . '~V power...pplia. 1&"",co
, ,boulel.., c
IOwA.
!
.
.
.
.
.
..",. +~voIl
...pply
-.
...
tblinU.JV
bek..GNDpoI..boI.
'C.x=r poIorily
~
t be""""""'*... rj,c. t~VMd,he "I~V(I')pins.
'T-
01
."'V
. 15(1')
...ppliam." be
ined.
'AdoquoIc
heal..ok
, be--'0
"'*P,be'"'" -""""
lessthan125'C.
.SpociCI<8
. l>acJ7.~.
Spocir"""l1
,.bio<r 'a <Iwtac ..i,
,
,i",.
'W""', error
--
"i.. """""'-
,.
ABSOLUTE MAXIMUM INPUTS
+15VtoGND ."
-15VtoGND
+5VtoGND
+15(p)to-15(p)
..."
,
Digital Inputs GND
. . . . . . . . , , . . .. +5.5V, O.3V
-
+17V
,...
-17V
+5.5V,-O.3V
+40V
-2-
REV.
A
ANALOG DEVICES fAX-ON-DEMAND HOTLINE
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Page
12
DRC1745/DRC1746
THEORY OF OPERATION
The operation of the DRCI745 and DRCI746 is illustrated in
the block diagram shown in Figure I.
The reference voltage, VR,EF,(A sin wt) is multiplied by both
Sin a and Cos e where 6 is the digital angle. The resultant outputs
then pass through the current booster output stage to provide
the resolver format output voltages viz:
and
2A Sinwt Sin e
2ASinwtCos6
+ 1511
The sine and cosine outputs are taken from the "Sin" and "Cos"
pins with "81G GND" as the common connection.
The remote sense facility using "Cos Sense" and "Sin Sense"
connections should be used as described under the "Remote
Output Sensing" heading, If not used, the sense OUtputs should
be connected to the corresponding Sin and Cos outputs.
DIGITAL DATA INPUT
The digital input to the converters is internally buffered by
transparent latches. The latches will be CMOS (type 54C373)
or low power Schottky (LSXtype 54LS373) depending on the
option.
The "HBE" input controls the input of the most significant 8
bits and the "LBE" input controls the input of the least significant
bits (6 in the case of the DRCI745 and 8 in the case of the
DRC1746).
A logic "Hi" on the control lines causes the input to appear
transparent and the converter output will follow the changes on
the digital input. When "HBE" and "LBE" arc taken to a logic
"Lo" state, the converter output will be latched at the level of
the data present on the inpUt at the low going edge and remains
constant until "HBE" and "LBE" arc taken to a "Hi" state
again. If the latches are not required, "HBE" and "LBE" can
be left open circuit. The timing diagram in Figure 2 illustrates
the use of "HBE" and "LBE".
(Sine output)
(Cosoutput)
-'1;11
+'SII(P!
(Note: Convener has a gain of 2 from input to output.)
SIN SENSE
OBS
A...
'A ;;~'wt!
Au>
SIN
(2A SIN ",' SIN III
SIG GNO
COS SENSE
+511
'L OPTIONS
ONLY!
LBE
HUE
DIGITAL
INPUT
"ND.-
15111PI
,I,
NOTE, ".0'0'" "GNO.', AND "
IN STAR POINT.
""'D" ARE INTERHALLYCONNECTED
Figure
7.
Theory of Operation
CONNECTING THE CONVERTER
The connections to the DRCl745 and DRC1746 are very
straightforward.
OLE
TE
D',~~
H8,"l8E
COs
(2.0 SIN .,t COS '"
Internal resistive pull-ups (to + 5V using 27k resistors) are
employed on all digital inputs. This ensures full TTL compatibility
for either latch option even when sourcing 50j.1Aof leakage
current into each external digital driver.
XXXJ
I
n
I
I STA8lE DATA
I
I
r><><><:><:
I
I
I
I
The digital inputs should be connected to the converter using
pins 1 (MSB) through 14 (LSB) in the case of the DRCl745
and through 16 (LSB) in the case of the DRCI746. The format
of the digital angular input is shown under the "Bit Weight
Table" section on this page.
The digital input control lines should be connected as described
under the "Digital Data Input" section.
ALOand Am are for the analog input reference voltage (VREF).
It should be noted that this is a single ended input where ALo is
grounded internally. If it is desired, the VIlEF input can be
externally isolated using the STMI680 or STMI660 transformer.
See the section on "Output and Reference Transformers".
The converters have separate power supply inputs for the output
amplifier
stage ( + 15V(P) and
~
,
I
I
t,
,
i
It,.
I
, t,
,
5n,MAXLSOPTiONS
140nsMAX
CMOS
OPTiONS
"20n.MAXLSOPTIONS
On,MAX
CMOS
OPTIONS
NOTE, INTERNAUATCHES ARE,
S313(LS! S4CJ1JICMOSt
Figure
2.
Data Transfer Diagram
BIT WEIGHT TABLE
Bit Number
Wdght
in
Depees
1 (MSB)
2
3
4
5
6
7
8
9
10
II
12
13
14 (LSBDRCI745)
15
16 (LSBDRCI746)
180.0000
90.0000
45.0000
22.5000
11.2500
5,6250
2,8125
1.4063
Qro31
0.3516
Ql~8
0.0879
0.0439
0.0220
0.0110
0.0055
-
15V(P» and for the remainder
of the converter (+ 15V and -15V), When dc power supplies
arc used for the output stage, the supplies may'be linked. However,
when pulsating power supplies are used for the output stage, a
separate dc supply must be provided for the + 15V and -15V
requirement, The conveners have internal capacitive decoupling
of 47nF on both power stage and convener supply but it is
recommended that 6.8~F capacitors arc taken from the + 15V
and -15V pin to "GND",
The "Case" pin is joined to the case which is isolated and should
be: WlUlect~ to a convenient zero potential point in the system.
REV,A
-3-
-~
ANALOGDEVICES FAX-ON-DEMAND HOTLINE
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Page
13
DRC1745/DRC1746
POWER DISSIPATION, PULSATING POWER SUPPLIES
AND 8EA T SINKING
The DRC1745 and the DRCI746 can be used with conventional
de power supplies or a pulsating power supply on the output
stage (see Figure 3). The laner gives significant reductions in
power dissipation within the hybrid package without any attendant
loss of accuracy.
When using a pulsating power supply, full advantage can be
taken of the special design which allows the power supply to
have a very low de pedestal voltage. This results in minimized
power dissipation. The pedestal voltage can in fact be as low as
3 volts. The combined pedestal plus peak supply voltage must
not exceed the absolute maximum rating.
Full accuracy is retained during operation on pulsating power
supplies because the output stage employing these supplies is
only used to provide current gain. OveralJ operational loop gain
is independently powered. There are no special switch-on/switch.
off power supply sequencing requirements, and fulJ internal
protection is provided.
WAVEFORM MUST BE IN PHASE WITH CONVERTER REFERENCE
ev"""
A SIN ",tl CONSISTENT WITH MAINTAINING A POWER
SUPPLY EXCESS OVER THE OUTPUT WAVEFORM GR£ATER
-mAN V...
=
v..
OBS
p
IV Be USUAllY
EOUALS v 0)
The section below demonstrates the power dissipation differences
for different load conditions when using dc supplies and pulsating
power supplies.
DC Power Supplies:
With inductive loads, the dc resistance is low compared with ac
impedance; therefore care should be taken to ensure that no dc
offset occurs at the sin and coo outputs. Note that under external
current limit conditions asymmetry of the power supplies could
occur, forcing a large dc offset to be present at the sin and cos
outputs causing heavy power dissipation in the device. Case
temperature must be maintained below 125°G.
Figure
3.
Pulsating Power Supply Format
Examples of Power Dissipation:
Many factors influence the power dissipation within the hybrid.
The folJowing two examples, using typical load values and
worst
case
digital angle conditions (45 degrees), illustrate the saving in
power dissipation which can be achieved by using Iipulsating
power supply employing a low pedestal voltage.
Note that in the following examples we have chosen:
V de
As the reference input, ARI>is directly coupled, outPUt offset
will occur if any dc component is present at this input.
When using de power supplies, the expression for additional
load dependent power dissipation is:
I
-
I
=
-;:--
(!Sme+ ,,",ooe)
Ir
2V.u)I',
VoliCosa
OLE
TE
=
:t IS volts
Vp
= 3volts
Vo = 9.6volts(6.8voltsrms)
V
O£
= 9.6volts(shouldbe chosento equalYo)
II
= 292mA(equivaJenttoa1.4VAmeanload)
1) DC power supply,
e
= 45°
resistive load.
p
2
(1)
= 2x15xO.292(Sin45°
+Cos45°) 9.6xO.292xl
-
'IT
2
= 3.943
-
1.402
=
2.54 Watts
Where V0 is the peak output voltage.
II is the peak valne of the output load current.
e is the digjtal angle.
exis the load phase angle.
Vde is the dc power supply voltage (usually :t 15 volts).
Pulsating Power Supplies:
When using a pulsating power supply, the expression for additional
load dependent power dissipation within the hybrid is:
2VTI
p =
=-:L.!.
(Sine
I
+
I
I
Cos6) +
-
11'
(Sina-aCosa)
(2)
I
Va,,!1
'IT
Where
V
lie
is the peak ac component of the pulsating power
supply assumed equal to the peak output voltage, Vo.
I, is the peak value of the output load current.
e is the digital angle.
ex is the load phase angle.
Vp is the dc pedestal vol rage of the pulsating power
supply.
Vo
Note that II
2) As example (I) but with a 3 volt pedestal pulsating power
supply.
From equation (2):
p
=
2 x 3 x 0.292(Sin45°
'IT
=
0.79 Watts
+Cos45°) + 9.6 x 0.292 x 0
1T
Thus the pulsating power supply has cut down the internal
dissipation by 1.75 watts, a ratio of 3.2:1.
A similar calculation using an inductive load shows a reduction
from 3.94 Watts, using a de power supply, to 1.68 Watts, when
a 3 volt pedestal pulsating power supply is used. Thus the pulsating
power supply has cut down the internal dissipation by 2.26
Watts, a ratio of 2.3:1.
The graph shown in Figure 4 shows the temperature at the
hottest part of the base of the hybrid (in the middle of the base
between" + 15V(P)" and the opposite uN/C" pin) for resistive
loads up to 2VA using de supplies and pulsating supplies with
pedestals of 3 volts and 5 volts.
Figure 5 shows a similar graph for inductive loads
up to IVA.
= jZf
where
Vo
Izj
=
2xVREF
=
output
=
Peak
output
load
voltage
-4-
REV. A
ANALOGDEVICES FAX-ON-DEMANDHOTLINE
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Page
1~
DRC1745/DRC1746
>55
16S
145
1JS
I'
1:>5
'"
116
"'1--.".
135
~........_...
I'
,
,."
115
105
~
~
cr:
i
x
~
~
..
~
;J
<>
...~_..
III
75
i
:::
..
"
~
..
I
%
OBS
NOTE,
LOAD POWER
- VA
..
D.D
0.2
D.4
D.O
D."
1.D
1.2
u
1.0
1.8
2.0
..
0.0
D.'
D,O
...
LOAD
1.0
POWER
1,2
- VA
1.4
1.6
1.8
2.0
1. _81E",~
TEMPERATURE
21'1:. NO HEAT SlftK,
2. TEMPERATuRE
MONITORED
WITH WORST CASE DIGITAL 'NNT
3. TEMPERATURE
MEASURED
ON HOTJEST
PART Of; CASE
'46'.
NOTE,
,. AMIIIENT T'£MPERATUBE
21'(;.",0
HEAT SINK.
2. TEMPERATURE
MONITORED
WITH WOBS,
CASE DIGITAL INPUT
J. TEMPERATURE
MEASURED
ON HOTIEST
PART DF CASE.
,...,.
Figure
4.
Case Temperature for Resistive Loads
Figure
5.
Case Temperature
Therefore
for Inductive Loads
As can be seen from Figures 4 and 5, it will be necessary to
provide heat sinking when driving significant loads in order to
keep the temperature of the case below its 12S.C maximum.
The converters have been designed with a flat metal base to
facilitate mounting on heat sinking materials. Special thermal
management, utilizing direct eutectic bonding, has been employed
in the output stage to minimize thermal resistance to:
Angle
6Junctionlcase = less than IrC/watt
eJunctionlcase
0°,90°
45". 135°
=
less
than 6°C/watt
Consequently the internal junction temperatures do not exceed
case header temperature by more than 20°C when using pulsating
power (even under worst case pure inductive load conditions.
The maximum permitted junction temperature is 15S.C).
CALCULATING THE LOAD
The following describes how to calculate the load.
In the case of synchro control transformers, fIrst determine the
value of ZIO' This impedance is normally quoted by the synchro
manufactUrer.
The load presented by the control transformer will be:
3
V2
iZ
OLE
TE
iZ""i
= v'700T + 49002 = 4950 Ohms
Therefore, the load presented by the control transformer
9023
4950x4
is:
=
1.23VA
Adding to this value O.25VA for the STMl683
1.48V A total.
gives a figure of
In the case of a resolver control transformer the same exercise
must be performed but it is not necessary to multiply by 3/4.
Some resolver manufacturers quote rms input current and in
this case the load will be the product of the input current and
the rms voltage used to drive it. The 0.25VA must be added if
the STM1683 transformer pair is used.
DRIVING CAPACITIVE
LOADS
Syncbros and resolvers often employ capacitive tuning to minimize
power dissipation. Tbis tuning can be on tbe load itself or (pref-
erably for best accuracy) on the primary of the transformer
driving the load. Full tuning modifies the load to appear resistive
at the reference frequency, bUt it appears progressively more
capacitive at all frequencies above.
Since the converter is an active negative feedback device, it is
essential to include a low value resistor in series with each tUning
capacitor to prevent highly dissipative output stage oscillation.
This resistor must not be less than 3.30. A value of 5.6n is
recommended when referred to the oUtput of the DRCl74S1
DRC1746.
The DRC1745 and DRC1746 can readily drive capacitive inputs
up to IOOnF at the converter output terminals withoUt special
precautions. However, please consult the factory when extreme
lengths of screened cable or any other cases of high capacitance
are to be driven. For example in the case of step-up transformers
where the effective capacitance to be driven is:
Ceft
4x
'
wbcr~V2is the rms signal input voltagc.
When the STM1683 output transformer pair is used, it is necessary
[0 add O.25VA to the calculated figure to allow for transformer
magnetizing current. For the STMI663 output transformer a
figure ofO.30VA should be added.
For example, assume that a 90V rms signal, 400Hz synchro
control transformer is to be driven by the DRCl745 in conjunction
with the STM1683/412 output transformer pair. (The STM1683/
412 boosts the 6.8V rms signal from the DRCl74S to the 9OV
rms required by the control transformer.)
Zso for the control transformer is quoted as:
700 + j4900
=
nlCt.
load.
Where CL is the capacitive
REV. A
-5-
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