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TSXPC860SRMZP66D

Description
RISC Microprocessor, 32-Bit, 66MHz, CMOS, PBGA357, PLASTIC, BGA-357
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size907KB,96 Pages
ManufacturerAtmel (Microchip)
Download Datasheet Parametric Compare View All

TSXPC860SRMZP66D Overview

RISC Microprocessor, 32-Bit, 66MHz, CMOS, PBGA357, PLASTIC, BGA-357

TSXPC860SRMZP66D Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerAtmel (Microchip)
Parts packaging codeBGA
package instructionBGA, BGA357,19X19,50
Contacts357
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Address bus width32
bit size32
boundary scanYES
maximum clock frequency66 MHz
External data bus width32
FormatFIXED POINT
Integrated cacheYES
JESD-30 codeS-PBGA-B357
JESD-609 codee0
length25 mm
low power modeYES
Number of terminals357
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Encapsulate equivalent codeBGA357,19X19,50
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Maximum seat height2.05 mm
speed66 MHz
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch1.27 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width25 mm
uPs/uCs/peripheral integrated circuit typeMICROPROCESSOR, RISC
Features
H
PowerPC single issue integer core.
H
Precise exception model.
H
Extensive system development support
- on-chip watchpoints and breakpoints,
- program flow tracking,
- On-chip emulation (OnCE) development interface.
H
High performance (Dhrystone 2.1: 52 MIPS @ 50 MHz, 3.3V, 1.3 Watts total power).
H
Low power (< 241 mW @25 MHz, 2.4 V internal, 3.3 V I/O-core, caches, MMUs, I/O).
H
MPC8XX PowerPC system interface, including a periodic interrupt timer, a bus monitor, and
real-time clocks.
H
Single Issue, 32-Bit Version of the Embedded PowerPC Core (fully Compatible with Book 1 of
the PowerPC Architecture Definition) with 32 X 32 – Bit Fixed Point Registers
– Embedded PowerPC Performs Branch Folding, Branch Prediction with Conditional Prefetch,
without Conditional Execution
– 4 Kbyte Data Cache and 4 Kbyte Instruction Cache, Each with an MMU
– Instruction and Data Caches are two way, Set Associative, Physical Address, 4 Word Line
Burst, Least Recently Used (LRU) Replacement, Lockable On-Line Granularity
– MMUs with 32 Entry TLB, Fully associative Instruction and Data TLBs
– MMUs Support Multiple Page Sizes of 4kB, 16 kB, 256 KB, 512 KB and 8 MB ; 16 Virtual
Address Spaces and 8 Protection Groups
– Advanced On-Chip-Emulation Debug Mode
H
Up to 32-bit Data Bus
(Dynamic Bus Sizing for 8 and 16 bits).
H
32 Address Lines
H
Fully Static Design.
H
V
CC
= +3.3 V± 5 % .
H
f
max
= 66 MHz (80 MHZ tbc)
TSPC860
32 BIT QUAD INTEGRATED
POWER QUICC
TM
COMMUNICATION
CONTROLLER
PRELIMINARY
SPECIFICATION
beta SITE
H
Military temperature range : –55°C < T
C
< +125°C.
H
P
D
= 0.75 W typical @ 66 MHz
H
ATM SAR support available on TSPC860SR version
Description
The TSPC860 PowerPCt QUad Integrated Communication Controller (Power
QUICCt)
is a
versatile one-chip integrated microprocessor and peripheral combination that can be used in a
variety of controller applications. It particularly excels in communications and networking sys-
tems. The Power QUICC (pronounced ”quick”) can be described as a PowerPC-based derivative
of TS68EN360 (QUICCt).
The CPU on the TSPC860 is a 32-bit PowerPC implementation that incorporates memory man-
agement units (MMUs) and instruction and data caches. The communications processor module
(CPM) of the TS68EN360 QUICC has been enhanced with the addition of the interprocessor-inte-
grated controller (I
2
C) channel. Moderate to high digital signal processing (DSP) functionality has
been added to the CPM. The memory controller has been enhanced, enabling the TSPC860 to
support any type of memory, including high performance memories and newer dynamic random
access memories (DRAMs). Overall system functionality is completed with the addition of a
PCMCIA socket controller supporting up to two sockets and a real-time clock.
PBGA 357
ZP suffix
Screening / Quality
This product will be manufactured in full compliance with :
H
Or according to ATMEL-Grenoble standard.
August 2000
1/96

TSXPC860SRMZP66D Related Products

TSXPC860SRMZP66D TSXPC860MHMZPU/T50C TSXPC860MHMZPU/T50B TSXPC860SRMZPU80D TSXPC860SRMZP50D TSXPC860SRMZPU/T66D TSXPC860MHVZPU/T40C TSXPC860SRVZPU80D TSXPC860SRVZPU40D TSXPC860MHMZPU50B
Description RISC Microprocessor, 32-Bit, 66MHz, CMOS, PBGA357, PLASTIC, BGA-357 Micro Peripheral IC, CBGA357, Micro Peripheral IC, CBGA357, RISC Microprocessor, 32-Bit, 80MHz, CMOS, PBGA357, PLASTIC, BGA-357 RISC Microprocessor, 32-Bit, 50MHz, CMOS, PBGA357, PLASTIC, BGA-357 RISC Microprocessor, 32-Bit, 66MHz, CMOS, PBGA357, PLASTIC, BGA-357 Micro Peripheral IC, CBGA357, RISC Microprocessor, 32-Bit, 80MHz, CMOS, PBGA357, PLASTIC, BGA-357 RISC Microprocessor, 32-Bit, 40MHz, CMOS, PBGA357, PLASTIC, BGA-357 RISC Microprocessor, 32-Bit, 50MHz, CMOS, PBGA357, PLASTIC, BGA-357
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
package instruction BGA, BGA357,19X19,50 BGA, BGA357,19X19,50 BGA, BGA357,19X19,50 BGA, BGA357,19X19,50 BGA, BGA357,19X19,50 PLASTIC, BGA-357 BGA, BGA357,19X19,50 BGA, BGA357,19X19,50 BGA, BGA357,19X19,50 BGA, BGA357,19X19,50
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant compliant compliant
JESD-30 code S-PBGA-B357 S-XBGA-B357 S-XBGA-B357 S-PBGA-B357 S-PBGA-B357 S-PBGA-B357 S-XBGA-B357 S-PBGA-B357 S-PBGA-B357 S-PBGA-B357
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0 e0 e0
Number of terminals 357 357 357 357 357 357 357 357 357 357
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 110 °C 110 °C 110 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -40 °C -40 °C -40 °C -55 °C
Package body material PLASTIC/EPOXY CERAMIC CERAMIC PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code BGA BGA BGA BGA BGA BGA BGA BGA BGA BGA
Encapsulate equivalent code BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50 BGA357,19X19,50
Package shape SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
Package form GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Nominal supply voltage 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES YES YES YES
Temperature level MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY INDUSTRIAL INDUSTRIAL INDUSTRIAL MILITARY
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form BALL BALL BALL BALL BALL BALL BALL BALL BALL BALL
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
Is it lead-free? Contains lead - - Contains lead Contains lead - - Contains lead Contains lead Contains lead
Maker Atmel (Microchip) - - - - Atmel (Microchip) Atmel (Microchip) Atmel (Microchip) Atmel (Microchip) Atmel (Microchip)
Parts packaging code BGA - - BGA BGA BGA - BGA BGA BGA
Contacts 357 - - 357 357 357 - 357 357 357
ECCN code 3A001.A.2.C - - 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C - 3A001.A.3 3A991.A.2 3A001.A.2.C
Address bus width 32 - - 32 32 32 - 32 32 32
bit size 32 - - 32 32 32 - 32 32 32
boundary scan YES - - YES YES YES - YES YES YES
maximum clock frequency 66 MHz - - 80 MHz 50 MHz 66 MHz - 80 MHz 40 MHz 50 MHz
External data bus width 32 - - 32 32 32 - 32 32 32
Format FIXED POINT - - FIXED POINT FIXED POINT FIXED POINT - FIXED POINT FIXED POINT FIXED POINT
Integrated cache YES - - YES YES YES - YES YES YES
length 25 mm - - 25 mm 25 mm 25 mm - 25 mm 25 mm 25 mm
low power mode YES - - YES YES YES - YES YES YES
Peak Reflow Temperature (Celsius) NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified - - Not Qualified Not Qualified Not Qualified - Not Qualified Not Qualified Not Qualified
Maximum seat height 2.05 mm - - 2.05 mm 2.05 mm 2.05 mm - 2.05 mm 2.05 mm 2.05 mm
speed 66 MHz - - 80 MHz 50 MHz 66 MHz - 80 MHz 40 MHz 50 MHz
Maximum supply voltage 3.465 V - - 3.465 V 3.465 V 3.465 V - 3.465 V 3.465 V 3.465 V
Minimum supply voltage 3.135 V - - 3.135 V 3.135 V 3.135 V - 3.135 V 3.135 V 3.135 V
technology CMOS - - CMOS CMOS CMOS - CMOS CMOS CMOS
Maximum time at peak reflow temperature NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 25 mm - - 25 mm 25 mm 25 mm - 25 mm 25 mm 25 mm
uPs/uCs/peripheral integrated circuit type MICROPROCESSOR, RISC - - MICROPROCESSOR, RISC MICROPROCESSOR, RISC MICROPROCESSOR, RISC - MICROPROCESSOR, RISC MICROPROCESSOR, RISC MICROPROCESSOR, RISC

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