Standard EEPROM ICs
SLx 24C04/P
4 Kbit (512
×
8 bit)
Serial CMOS-EEPROM with
I
2
C Synchronous 2-Wire Bus
and Page Protection Mode
™
Data Sheet 1999-02-02
Edition 1999-02-02
Published by Siemens AG,
Bereich Halbleiter, Marketing-
Kommunikation, Balanstraße 73,
81541 München
©
Siemens AG 1999.
All Rights Reserved.
Attention please!
As far as patents or other rights of third par-
ties are concerned, liability is only assumed
for components, not for applications, pro-
cesses and circuits implemented within
components or assemblies.
The information describes the type of
component and shall not be considered as
assured characteristics.
Terms of delivery and rights to change design
reserved.
For questions on technology, delivery and
prices please contact the Semiconductor
Group Offices in Germany or the Siemens
Companies and Representatives worldwide
(see address list).
Due to technical requirements components
may contain dangerous substances. For
information on the types in question please
contact your nearest Siemens Office,
Semiconductor Group.
Siemens AG is an approved CECC
manufacturer.
Packing
Please use the recycling operators known to
you. We can also help you – get in touch with
your nearest sales office. By agreement we
will take packing material back, if it is sorted.
You must bear the costs of transport.
For packing material that is returned to us
unsorted or which we are not obliged to
accept, we shall have to invoice you for any
costs incurred.
Components used in life-support devices
or systems must be expressly authorized
for such purpose!
Critical components
1
of the Semiconductor
Group of Siemens AG, may only be used in
life-support devices or systems
2
with the
express written approval of the
Semiconductor Group of Siemens AG.
1 A critical component is a component used
in a life-support device or system whose
failure can reasonably be expected to
cause the failure of that life-support
device or system, or to affect its safety or
effectiveness of that device or system.
2 Life support devices or systems are
intended (a) to be implanted in the human
body, or (b) to support and/or maintain
and sustain human life. If they fail, it is
reasonable to assume that the health of
the user may be endangered.
SLx 24C04/P
Revision History:
Previous Version:
Page
Page
(in previous (in current
Version)
Version)
Current Version: 1999-02-02
06.97
Subjects (major changes since last revision)
Changes in the complete P-DIP-8-4 changed to P-DIP-8-3, P-DSO-8-3 changed to P-DSO-8-2.
document
3
4
4
4
4, 5
5
5
5
6
11, 12
13
15
17
21
19
22
23
25
25
25
4
5
5
5
5, 5
–
6
6
7
12, 13
14
16
18
22
25
23
24
26
26
26
Text changed to “Typical programming time 5 ms for up to 16 bytes”.
SLA 24C04-D-3/P and SLA 24C04-S-3/P deleted.
Voltage changed from 4.5 V...5.5 V to 2.7 V...5.5 V.
Package (TSSOP, die, wafer delivery) added.
CS0, CS1 and CS2 replaced by n.c.
The paragraph “Chip Select (CS0, CS1, CS2)” removed completely.
WP =
V
CC
protects the upper half entire memory.
WP switched to
V
CC
protects the entire upper half of the….
Text changed to “The device with a voltage range of 2.7 … 5.5. V is
available …”.
The erase/write cycle is finished latest after 10 8 ms.
Text added “(see
figure 10)”.
Figure 11: second command byte is a
CSR
and not CSW.
Figure 13: “CSW” changed to “CSR”.
The write or erase cycle is finished latest after 10 4 ms.
“Capacitive load …” added.
Figure 17: “ACK” deleted before “STOP”.
Line “Supply voltage”: Text deleted.
Some timings changed.
The line “erase/write cycle” removed.
Chapter 9.4 “Erase and Write Characteristics” added.
Page Protection Mode™ is a trademark of Siemens AG.
I
2
C Bus
Purchase of Siemens
I
2
C components conveys the license under the Philips
I
2
C patent to use the components in
the
I
2
C system provided the system conforms to the
I
2
C specifications defined by Philips.
4 Kbit (512
×
8 bit) Serial CMOS
EEPROMs,
I
2
C Synchronous 2-Wire Bus,
Page Protection Mode
™
SLx 24C04/P
1
1.1
Overview
Features
• Data EEPROM internally organized as
512 bytes and 32 pages
×
16 bytes
• Page protection mode, flexible page-by-page
hardware write protection
– Additional protection EEPROM of 32 bits, 1 bit per
data page
– Protection setting for each data page by writing its
protection bit
– Protection management without switching WP pin
• Low power CMOS
•
V
CC
= 2.7 to 5.5 V operation
• Two wire serial interface bus,
I
2
C-Bus compatible
• Filtered inputs for noise suppression with
Schmitt trigger
P-DIP-8-3
P-DSO-8-2
• Clock frequency up to 400 kHz
• High programming flexibility
– Internal programming voltage
– Self timed programming cycle including erase
– Byte-write and page-write programming, between 1 and 16 bytes
– Typical programming time 5 ms for up to 16 bytes
• High reliability
– Endurance 10
6
cycles
1)
– Data retention 40 years
1)
– ESD protection 4000 V on all pins
• 8 pin DIP/DSO packages
• Available for extended temperature ranges
– Industrial:
−
40 °C to + 85 °C
– Automotive:
−
40 °C to + 125 °C
1)
Values are temperature dependent, for further information please refer to your Siemens Sales office.
Semiconductor Group
4
1999-02-02
SLx 24C04/P
Ordering Information
Type
SLA 24C04-D/P
SLA 24C04-S/P
SLE 24C04-D/P
SLE 24C04-S/P
Ordering Code
Q67100-H3527
Q67100-H3532
Q67100-H3525
Q67100-H3530
Package
P-DIP-8-3
P-DIP-8-3
Temperature
– 40 °C … + 85 °C
Voltage
2.7 V...5.5 V
2.7 V...5.5 V
P-DSO-8-2 – 40 °C … + 85 °C
– 40°C … + 125 °C 2.7 V...5.5 V
P-DSO-8-2 – 40°C … + 125 °C 2.7 V...5.5 V
Other types are available on request
– Temperature range (– 55 °C
…
+ 150 °C)
– Package (TSSOP, die, wafer delivery)
2
Pin Configuration
P-DIP-8-3
N.C.
N.C.
N.C.
1
2
3
4
8
7
6
5
IEP02515
P-DSO-8-2
V
CC
WP
SCL
SDA
N.C.
N.C.
N.C.
V
SS
1
2
3
4
8
7
6
5
IEP02514
V
CC
WP
SCL
SDA
V
SS
Figure 1
Pin Configuration
(top view)
Pin Definitions and Functions
Table 1
Pin No.
1, 2, 3
4
5
6
7
8
Symbol
N.C.
Function
Not connected
Ground
Serial bidirectional data bus
Serial clock input
Write protection input
Supply voltage
V
SS
SDA
SCL
WP
V
CC
Semiconductor Group
5
1999-02-02
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