TC86R4400YS-S7G datasheet, PDF

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TC86R4400YS-S7G: DescriptionIC 64-BIT, 75 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，32 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/

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TC86R4400YS-S7G Overview

IC 64-BIT, 75 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor

TC86R4400YS-S7G Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Toshiba Semiconductor
Parts packaging code	PGA
package instruction	HIPGA,
Contacts	447
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Other features	MMU WITH 96 ENTRY TLB; SECONDARY CACHE INTERFACE; 8 PIPELINE STAGES
Address bus width	64
bit size	64
boundary scan	YES
maximum clock frequency	75 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	NO
JESD-30 code	S-CPGA-P447
JESD-609 code	e0
length	52.32 mm
low power mode	YES
Number of DMA channels
Number of external interrupt devices	2
Number of serial I/Os
Number of terminals	447
On-chip data RAM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	HIPGA
Package shape	SQUARE
Package form	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	6.24 mm
speed	75 MHz
Maximum slew rate	3000 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3.3 V
Nominal supply voltage	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	52.32 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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TC86R4400YS-S7G Related Products

	TC86R4400YS-S7G	TC86R4400Y-MAH	TC86R4400YS-M7G	TC86R4400Y-PAH	TC86R4400Y-P7G	TC86R4400Y-M7G	TC86R4400Y-S7G	TC86R4400Y-SAH	TC86R4400YS-SAH	TC86R4400YS-MAH
Description	IC 64-BIT, 75 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor	IC 64-BIT, 100 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor	IC 64-BIT, 75 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor	IC 64-BIT, 100 MHz, RISC PROCESSOR, CPGA179, Microprocessor	IC 64-BIT, 75 MHz, RISC PROCESSOR, CPGA179, Microprocessor	IC 64-BIT, 75 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor	IC 64-BIT, 75 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor	IC 64-BIT, 100 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor	IC 64-BIT, 100 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor	IC 64-BIT, 100 MHz, RISC PROCESSOR, CPGA447, HEAT SINK, PGA-447, Microprocessor
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
package instruction	HIPGA,	HIPGA,	HIPGA,	PGA,	PGA,	HIPGA,	HIPGA,	HIPGA,	HIPGA,	HEAT SINK, PGA-447
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Other features	MMU WITH 96 ENTRY TLB; SECONDARY CACHE INTERFACE; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; SECONDARY CACHE INTERFACE; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; SECONDARY CACHE INTERFACE; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; SECONDARY CACHE INTERFACE; 8 PIPELINE STAGES	MMU WITH 96 ENTRY TLB; 8 PIPELINE STAGES
Address bus width	64	64	64	64	64	64	64	64	64	64
bit size	64	64	64	64	64	64	64	64	64	64
boundary scan	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
maximum clock frequency	75 MHz	100 MHz	75 MHz	100 MHz	75 MHz	75 MHz	75 MHz	100 MHz	100 MHz	100 MHz
External data bus width	64	64	64	64	64	64	64	64	64	64
Format	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT
Integrated cache	NO	NO	NO	NO	NO	NO	NO	NO	NO	NO
JESD-30 code	S-CPGA-P447	S-CPGA-P447	S-CPGA-P447	S-CPGA-P179	S-CPGA-P179	S-CPGA-P447	S-CPGA-P447	S-CPGA-P447	S-CPGA-P447	S-CPGA-P447
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	52.32 mm	52.32 mm	52.32 mm	47.24 mm	47.24 mm	52.32 mm	52.32 mm	52.32 mm	52.32 mm	52.32 mm
low power mode	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
Number of external interrupt devices	2	2	2	7	7	2	2	2	2	2
Number of terminals	447	447	447	179	179	447	447	447	447	447
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	HIPGA	HIPGA	HIPGA	PGA	PGA	HIPGA	HIPGA	HIPGA	HIPGA	HIPGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	GRID ARRAY	GRID ARRAY	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	6.24 mm	6.24 mm	6.24 mm	4.52 mm	4.52 mm	6.24 mm	6.24 mm	6.24 mm	6.24 mm	6.24 mm
speed	75 MHz	100 MHz	75 MHz	100 MHz	75 MHz	75 MHz	75 MHz	100 MHz	100 MHz	100 MHz
Maximum supply voltage	3.6 V	3.62 V	3.6 V	3.62 V	3.6 V	3.6 V	3.6 V	3.62 V	3.62 V	3.62 V
Minimum supply voltage	3.3 V	3.28 V	3.3 V	3.28 V	3.3 V	3.3 V	3.3 V	3.28 V	3.28 V	3.28 V
Nominal supply voltage	3.3 V	3.45 V	3.3 V	3.45 V	3.3 V	3.3 V	3.3 V	3.45 V	3.45 V	3.45 V
surface mount	NO	NO	NO	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	TIN LEAD
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	52.32 mm	52.32 mm	52.32 mm	47.24 mm	47.24 mm	52.32 mm	52.32 mm	52.32 mm	52.32 mm	52.32 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC
Maker	Toshiba Semiconductor	-	-	-	-	Toshiba Semiconductor	Toshiba Semiconductor	Toshiba Semiconductor	Toshiba Semiconductor	Toshiba Semiconductor
Parts packaging code	PGA	PGA	PGA	-	-	PGA	PGA	PGA	PGA	PGA
Contacts	447	447	447	-	-	447	447	447	447	447
ECCN code	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	-

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