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ZVP3310ASTZ

Description
Small Signal Field-Effect Transistor, 0.14A I(D), 100V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-92 COMPATIBLE, E-LINE PACKAGE-3
CategoryDiscrete semiconductor    The transistor   
File Size128KB,3 Pages
ManufacturerDiodes Incorporated
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ZVP3310ASTZ Overview

Small Signal Field-Effect Transistor, 0.14A I(D), 100V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-92 COMPATIBLE, E-LINE PACKAGE-3

ZVP3310ASTZ Parametric

Parameter NameAttribute value
MakerDiodes Incorporated
Parts packaging codeTO-92
package instructionTO-92 COMPATIBLE, E-LINE PACKAGE-3
Contacts3
Reach Compliance Codeunknown
ECCN codeEAR99
ConfigurationSINGLE
Minimum drain-source breakdown voltage100 V
Maximum drain current (ID)0.14 A
Maximum drain-source on-resistance20 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PSIP-W3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeP-CHANNEL
Certification statusNot Qualified
surface mountNO
Terminal surfaceMATTE TIN
Terminal formWIRE
Terminal locationSINGLE
Maximum time at peak reflow temperature40
transistor applicationsSWITCHING
Transistor component materialsSILICON

ZVP3310ASTZ Preview

P-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – MARCH 94
FEATURES
* 100 Volt V
DS
* R
DS(on)
=20Ω
ZVP3310A
D
G
S
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at T
amb
=25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at T
amb
=25°C
Operating and Storage Temperature Range
SYMBOL
V
DS
I
D
I
DM
V
GS
P
tot
T
j
:T
stg
E-Line
TO92 Compatible
VALUE
-100
-140
-1.2
±
20
UNIT
V
mA
A
V
mW
°C
625
-55 to +150
ELECTRICAL CHARACTERISTICS (at T
amb
= 25°C unless otherwise stated).
PARAMETER
Drain-Source Breakdown
Voltage
Gate-Source Threshold
Voltage
Gate-Body Leakage
Zero Gate Voltage Drain
Current
On-State Drain Current(1)
SYMBOL MIN.
BV
DSS
V
GS(th)
I
GSS
I
DSS
I
D(on)
-300
20
50
50
15
5
8
8
8
8
-100
-1.5
-3.5
20
-1
-50
MAX. UNIT CONDITIONS.
V
V
nA
µ
A
µ
A
I
D
=-1mA, V
GS
=0V
ID=-1mA, V
DS
= V
GS
V
GS
=
±
20V, V
DS
=0V
V
DS
=-100V, V
GS
=0
V
DS
=-80V, V
GS
=0V, T=125°C
(2)
V
DS
=-25 V, V
GS
=-10V
V
GS
=-10V,I
D
=-150mA
V
DS
=-25V,I
D
=-150mA
mA
Static Drain-Source On-State R
DS(on)
Resistance (1)
Forward Transconductance
(1)(2)
Input Capacitance (2)
Common Source Output
Capacitance (2)
Reverse Transfer
Capacitance (2)
Turn-On Delay Time (2)(3)
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Fall Time (2)(3)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
mS
pF
pF
pF
ns
ns
ns
ns
V
DS
=-25V, V
GS
=0V, f=1MHz
V
DD
-25V, I
D
=-150mA
(1) Measured under pulsed conditions. Width=300
µ
s. Duty cycle
2%
(2) Sample test.
3-432
Switching times measured with 50
source impedance and <5ns rise time on a pulse generator
(
3
)
ZVP3310A
TYPICAL CHARACTERISTICS
V
GS=
-20V
-16V
-12V
V
GS=
-20V
-16V
-14V
-12V
-10V
-9V
-8V
-7V
-0.2
-6V
-5V
0
-2
-4
-6
-8
-4V
-10
I
D
- Drain Current (Amps)
-0.6
-0.6
-9V
-0.4
-8V
-7V
-6V
I
D
- Drain Current (Amps)
-10V
-0.4
-0.2
-5V
-4.5V
-4V
-3.5V
0
-10
-20
-30
-40
-50
0
V
DS
- Drain Source
Voltage (Volts)
V
DS
- Drain Source
Voltage (Volts)
Output Characteristics
Saturation Characteristics
-10
V
DS-
Drain Source
Voltage (Volts)
I
D
- Drain Current (Amps)
-0.6
-8
-6
I
D=
-0.3A
-0.15A
-0.075A
0
0
-2
-4
-6
-8
-10
-0.4
V
DS=
-10V
-4
-0.2
-2
0
0
-2
-4
-6
-8
-10
V
GS-
Gate Source Voltage
(Volts)
V
GS-
Gate Source
Voltage (Volts)
Voltage Saturation Characteristics
R
DS(on)
-Drain Source On Resistance
(Ω)
-6V -7V -8V -10V
Transfer Characteristics
V
GS
=-4V
100
-5V
2.6
Normalised R
DS(on)
and V
GS(th)
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
-40 -20
0
D
eR
nc
ta
sis
V
GS=
-10V
I
D=
-150mA
)
on
S(
50
-20V
V
GS=
V
DS
Dr
I
D=
-1mA
Gate Thresh
old Voltage
V
GS(TH)
20 40 60 80 100 120 140 160 180
Re
ce
ur
o
-S
ain
10
-10
-100
-1000
I
D-
Drain Current
(mA)
T
j
-Junction Temperature (°C)
On-resistance v drain current
Normalised R
DS(on)
and V
GS(th)
v Temperature
3-433
ZVP3310A
TYPICAL CHARACTERISTICS
100
100
g
fs
-Transconductance (mS)
90
80
70
60
50
40
30
20
10
0
0
-0.1
-0.2
-0.3 -0.4
-0.5
-0.6
-0.7
-0.8
V
DS=
-10V
g
fs
-Transconductance (mS)
90
80
70
60
50
40
30
20
10
0
0 -1
-2
-3
-4
-5
-6
-7
-8
-9
-10
V
DS=
-10V
I
D
- Drain Current (Amps)
V
GS
-Gate Source Voltage (Volts)
Transconductance v drain current
Transconductance v gate-source voltage
50
40
30
20
10
0
0
-10
-20
-30
-40
-50
-60
V
GS=
0V
f
=1MHz
V
GS
-Gate Source Voltage (Volts)
0
-2
-4
-6
-8
-10
-12
-14
-16
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
V
DS
=
-25V
-50V
-100V
I
D=-
0.2A
C-Capacitance (pF)
C
iss
C
oss
C
rss
-70
-80
V
DS
-Drain Source Voltage (Volts)
Q-Charge (nC)
Capacitance v drain-source voltage
Gate charge v gate-source voltage
3-434

ZVP3310ASTZ Related Products

ZVP3310ASTZ ZVP3310ASTOB
Description Small Signal Field-Effect Transistor, 0.14A I(D), 100V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-92 COMPATIBLE, E-LINE PACKAGE-3 Small Signal Field-Effect Transistor, 0.14A I(D), 100V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-92 COMPATIBLE, E-LINE PACKAGE-3
Maker Diodes Incorporated Diodes Incorporated
Parts packaging code TO-92 TO-92
package instruction TO-92 COMPATIBLE, E-LINE PACKAGE-3 TO-92 COMPATIBLE, E-LINE PACKAGE-3
Contacts 3 3
Reach Compliance Code unknown unknow
ECCN code EAR99 EAR99
Configuration SINGLE SINGLE
Minimum drain-source breakdown voltage 100 V 100 V
Maximum drain current (ID) 0.14 A 0.14 A
Maximum drain-source on-resistance 20 Ω 20 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JESD-30 code R-PSIP-W3 R-PSIP-W3
JESD-609 code e3 e3
Humidity sensitivity level 1 1
Number of components 1 1
Number of terminals 3 3
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE
Peak Reflow Temperature (Celsius) 260 260
Polarity/channel type P-CHANNEL P-CHANNEL
Certification status Not Qualified Not Qualified
surface mount NO NO
Terminal surface MATTE TIN MATTE TIN
Terminal form WIRE WIRE
Terminal location SINGLE SINGLE
Maximum time at peak reflow temperature 40 40
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
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