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70825S25GI

Description
Application Specific SRAM, 8KX16, 25ns, CMOS, PPGA84
Categorystorage    storage   
File Size193KB,21 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

70825S25GI Overview

Application Specific SRAM, 8KX16, 25ns, CMOS, PPGA84

70825S25GI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Reach Compliance Codenot_compliant
Maximum access time25 ns
JESD-30 codeS-PPGA-P84
JESD-609 codee0
memory density131072 bit
Memory IC TypeAPPLICATION SPECIFIC SRAM
memory width16
Number of terminals84
word count8192 words
character code8000
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize8KX16
Package body materialPLASTIC/EPOXY
encapsulated codePGA
Encapsulate equivalent codePGA84M,11X11
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)225
power supply5 V
Certification statusNot Qualified
Maximum standby current0.015 A
Maximum slew rate0.36 mA
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationPERPENDICULAR
Maximum time at peak reflow temperature30
IDT70825S/L
HIGH SPEED 128K (8K X 16 BIT)
SEQUENTIAL ACCESS
RANDOM ACCESS MEMORY (SARAM™)
Features
High-speed access
– Commercial: 20/25/35/45ns (max.)
Low-power operation
– IDT70825S
Active: 775mW (typ.)
Standby: 5mW (typ.)
– IDT70825L
Active: 775mW (typ.)
Standby: 1mW (typ.)
8K x 16 Sequential Access Random Access Memory
(SARAM
)
– Sequential Access from one port and standard Random
Access from the other port
– Separate upper-byte and lower-byte control of the
Random Access Port
High speed operation
– 20ns t
AA
for random access port
– 20ns t
CD
for sequential port
– 25ns clock cycle time
Architecture based on Dual-Port RAM cells
Compatible with Intel BMIC and 82430 PCI Set
Width and Depth Expandable
Sequential side
– Address based flags for buffer control
– Pointer logic supports up to two internal buffers
Battery backup operation - 2V data retention
TTL-compatible, single 5V (+10%) power supply
Available in 80-pin TQFP and 84-pin PGA
Industrial temperature range (-40°C to +85°C) is available
for selected speeds
Description
The IDT70825 is a high-speed 8K x 16-Bit Sequential Access
Random Access Memory (SARAM). The SARAM offers a single-chip
solution to buffer data sequentially on one port, and be accessed
randomly (asynchronously) through the other port. The device has a
Dual-Port RAM based architecture with a standard SRAM interface for the
random (asynchronous) access port, and a clocked interface with counter
Functional Block Diagram
A
0-12
CE
OE
R/W
LB
LSB
MSB
UB
CMD
I/O
0-15
13
Random
Access
Port
Controls
Sequential
Access
Port
Controls
8K X 16
Memory
Array
16
13
RST
SCLK
CNTEN
SOE
SSTRT
1
SSTRT
2
SCE
SR/W
SLD
SI/O
0-15
,
Data
L
Addr
L
Data
R
Addr
R
16
Reg.
13
16
13
13
13
13
RST
Pointer/
Counter
Start Address for Buffer #1
End Address for Buffer #1
Start Address for Buffer #2
End Address for Buffer #2
Flow Control Buffer
Flag Status
13
EOB
1
COMPARATOR
EOB
2
3016 drw 01
JANUARY 2009
1
©2009 Integrated Device Technology, Inc.
DSC-3016/10
6.07
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