High performance 64-bit microprocessor, based on the
RISCore4000
– Minimized branch and load delays, through streamlined
5-stage scalar pipeline.
– Single and double precision floating-point unit
– 125 peak MFLOP/s at 250 MHz
– 330 Dhrystone MIPS at 250 MHz
– Flexible RC4700-compatible MMU
– Joint TLB on-chip, for virtual-to-physical address mapping
x
On-chip two-way set associative caches
– 16KB instruction cache (I-cache)
– 16KB data cache (D-cache)
x
Optional I-cache and D-cache locking (per set), provides
improved real-time support
x
Enhanced, flexible bus interface allows simple, low-cost
design
– 64-bit Bus Interface option, 1000MB/s bandwidth support
– 32-bit Bus Interface option, 500MB/s bandwidth support
– SDRAM timing protocol, through delayed data in write cycles
– RC4000/RC5000 family bus-protocol compatibility
– Bus runs at fraction of pipeline clock (1/2 to 1/8)
x
Implements MIPS-III Instruction Set Architecture (ISA)
x
3.3V core with 3.3V I/O
Software compatible with entire RISController Series of
Embedded Microprocessors
x
Industrial temperature range support
x
Active power management
– Powers down inactive units, through sleep-mode feature
x
100% pin compatibility between RC64574, RC64474 and
RC4640
x
100% pin compatibility between RC64575, RC64475 and
RC4650
x
RC64474 available in 128-pin QFP package, for 32-bit only
systems
x
RC64475 available in 208-pin QFP package, for full 64/32 bit
systems
x
Simplified board-level testing, through full Joint Test Action
Group (JTAG) boundary scan
x
Windows® CE compliant
The IDT logo is a registered trademark and RC32134, RC32364, RC64145, RC64474, RC64475, RC4650, RC4640, RC4600,RC4700 RC3081, RC3052, RC3051, RC3041, RISController, and RISCore are trade-
jonathan@chinaeejob.com IC Design Recruitment (Beijing) System Migration Engineer 1. Do system platform migration. 2. Understand ARM and liunx. 3. Familiar with audio and video codec (h.264. AVS, etc....
Reposted from: ricky I saw an article about Finite State Machine (FSM) on the Internet, "[url=http://www.dzkf.cn/html/EDAjishu/2008/0109/2946.html]VHDL Optimization Design of Finite State Machine[/url...
[color=black]Use QUARTUSII to do the whole process of FPGA development, a fool-proof detailed tutorial, I hope it will be helpful to everyone[/color]...
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