IDT49C402G68 datasheet, PDF - EEWORLD Datasheet

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IDT49C402G68: DescriptionBit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, CAVITY-UP, PGA-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size591KB，14 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT49C402G68 Overview

Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, CAVITY-UP, PGA-68

IDT49C402G68 Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
Parts packaging code	PGA
package instruction	PGA,
Contacts	68
Reach Compliance Code	unknown
maximum clock frequency	20.83 MHz
External data bus width	16
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
length	29.464 mm
Number of terminals	68
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Certification status	Not Qualified
Maximum seat height	5.207 mm
Maximum slew rate	95 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	29.464 mm
uPs/uCs/peripheral integrated circuit type	BIT-SLICE MICROPROCESSOR

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IDT49C402G68 Related Products

	IDT49C402G68	IDT49C402AG68	IDT49C402AG68B	IDT49C402BJ	IDT49C402BG68B	IDT49C402J	IDT49C402AJ	IDT49C402BG68	IDT49C402G68B
Description	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, CAVITY-UP, PGA-68	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, CAVITY-UP, PGA-68	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, CAVITY-UP, PGA-68	Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, CAVITY-UP, PGA-68	Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68	Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, CAVITY-UP, PGA-68	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, CAVITY-UP, PGA-68
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	PGA	PGA	PGA	LCC	PGA	LCC	LCC	PGA	PGA
package instruction	PGA,	PGA,	PGA,	PLASTIC, LCC-68	PGA,	PLASTIC, LCC-68	PLASTIC, LCC-68	PGA,	PGA,
Contacts	68	68	68	68	68	68	68	68	68
Reach Compliance Code	unknown	unknown	unknown	not_compliant	unknown	not_compliant	not_compliant	unknown	unknow
maximum clock frequency	20.83 MHz	32.26 MHz	27.77 MHz	50 MHz	41.67 MHz	20.83 MHz	32.26 MHz	50 MHz	20 MHz
External data bus width	16	16	16	16	16	16	16	16	16
JESD-30 code	S-CPGA-P68	S-CPGA-P68	S-CPGA-P68	S-PQCC-J68	S-CPGA-P68	S-PQCC-J68	S-PQCC-J68	S-CPGA-P68	S-CPGA-P68
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	29.464 mm	29.464 mm	29.464 mm	24.2062 mm	29.464 mm	24.2062 mm	24.2062 mm	29.464 mm	29.464 mm
Number of terminals	68	68	68	68	68	68	68	68	68
Maximum operating temperature	70 °C	70 °C	125 °C	70 °C	125 °C	70 °C	70 °C	70 °C	125 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	PGA	PGA	QCCJ	PGA	QCCJ	QCCJ	PGA	PGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	CHIP CARRIER	GRID ARRAY	CHIP CARRIER	CHIP CARRIER	GRID ARRAY	GRID ARRAY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.207 mm	5.207 mm	5.207 mm	4.572 mm	5.207 mm	4.572 mm	4.572 mm	5.207 mm	5.207 mm
Maximum slew rate	95 mA	95 mA	130 mA	95 mA	130 mA	95 mA	95 mA	95 mA	130 mA
Maximum supply voltage	5.25 V	5.25 V	5.5 V	5.25 V	5.5 V	5.25 V	5.25 V	5.25 V	5.5 V
Minimum supply voltage	4.75 V	4.75 V	4.5 V	4.75 V	4.5 V	4.75 V	4.75 V	4.75 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	YES	NO	YES	YES	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	MILITARY	COMMERCIAL	MILITARY	COMMERCIAL	COMMERCIAL	COMMERCIAL	MILITARY
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD	Tin/Lead (Sn85Pb15)	TIN LEAD	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	TIN LEAD	TIN LEAD
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG	J BEND	PIN/PEG	J BEND	J BEND	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	1.27 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	QUAD	PERPENDICULAR	QUAD	QUAD	PERPENDICULAR	PERPENDICULAR
width	29.464 mm	29.464 mm	29.464 mm	24.2062 mm	29.464 mm	24.2062 mm	24.2062 mm	29.464 mm	29.464 mm
uPs/uCs/peripheral integrated circuit type	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR
ECCN code	-	3A991.A.2	3A001.A.2.C	3A001.A.3	3A001.A.2.C	-	3A991.A.2	3A001.A.3	3A001.A.2.C

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