LPR520DMB30 datasheet, PDF - EEWORLD Datasheet

LPR520DMB30: DescriptionPipeline Register, 16-Bit, CMOS, CDIP40, 0.600 INCH, HERMETIC SEALED, SIDE BRAZED, DIP-40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size183KB，5 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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LPR520DMB30 Overview

Pipeline Register, 16-Bit, CMOS, CDIP40, 0.600 INCH, HERMETIC SEALED, SIDE BRAZED, DIP-40

Parameter Name	Attribute value
Maker	LOGIC Devices
Parts packaging code	DIP
package instruction	DIP,
Contacts	40
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	ICC SPECIFIED @ 5MHZ
boundary scan	NO
External data bus width	16
JESD-30 code	R-CDIP-T40
length	50.8 mm
low power mode	NO
Number of terminals	40
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output data bus width	16
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Certification status	Not Qualified
Maximum seat height	4.953 mm
Maximum slew rate	25 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, PIPELINE REGISTER

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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