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FT27C512R-12DI

Description
UVPROM, 64KX8, 120ns, CMOS, CDIP28, 0.600 INCH, WINDOWED, CERDIP-28
Categorystorage    storage   
File Size436KB,10 Pages
ManufacturerForce Technologies Ltd.
Download Datasheet Parametric View All

FT27C512R-12DI Overview

UVPROM, 64KX8, 120ns, CMOS, CDIP28, 0.600 INCH, WINDOWED, CERDIP-28

FT27C512R-12DI Parametric

Parameter NameAttribute value
MakerForce Technologies Ltd.
Parts packaging codeDIP
package instructionDIP,
Contacts28
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time120 ns
JESD-30 codeR-CDIP-T28
memory density524288 bit
Memory IC TypeUVPROM
memory width8
Number of functions1
Number of terminals28
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize64KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formTHROUGH-HOLE
Terminal locationDUAL
Features
Fast Read Access
Time - 70ns
Low-Power CMOS Operation
– 100
µ
A max. Standby
– 20 mA max. Active at 5 MHz
JEDEC Standard Packages
– 28-Lead 600-mil Windowed CDIL
– 32-Lead Windowed LCC/JLCC
– 28-Lead
Custom
5V
±
10% Supply
High-Reliability Atmel CMOS die Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid
Atmel Programming Algorithm - 100 mms/byte (typical)
m
m
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial, Industrial, Mil Temperature Ranges inc Hi-Rel /DMB/8 883 5004/5005
512K (64K x 8)
UVEPROM
FT27C512R
Description
The
FT27C512R is a low-power,
high-performance
524,288-bit UV erasable program-
mable read only memory (UVEPROM) organized 64K by 8 bits. It requires only one 5V
power supply in normal read mode operation. Any byte can be accessed in less than
45 ns, eliminating the need for speed reducing WAIT states on high-performance
microprocessor systems.
Atmel’s die in CMOS technology provides high-speed, lower active power consump-
tion, and significantly faster programming. Power consumption is typically only 8 mA
in Active Mode and less than 10
µA
in Standby.
(continued)
Pin Configurations
Pin Name
A0 to A15
O0 - O7
CE
OE/VPP
NC
Function
Addresses
Outputs
Chip Enable
Output Enable/VPP
No Connect
CDILTop View
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3
512K EPROM
LCC/JLCC Top View
A7
A12
A15
NC
VCC
A14
A13
Note:
LCC/JLCC Package Pins 1
and
17 are DON’T CONNECT.
O1
O2
GND
NC
O3
O4
O5
14
15
16
17
18
19
20
A6
A5
A4
A3
A2
A1
A0
NC
O0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
A8
A9
A11
NC
OE/VPP
A10
CE
O7
O6
1
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