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Datasheet> All Categories > logic> logic> MC74VHC1G08DFT4
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MC74VHC1G08DFT4

Description
AHC/VHC SERIES, 2-INPUT AND GATE, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN
Categorylogic    logic   
File Size116KB，6 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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MC74VHC1G08DFT4 Overview

AHC/VHC SERIES, 2-INPUT AND GATE, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN

MC74VHC1G08DFT4 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeSOT-353
package instructionTSSOP, TSSOP5/6,.08
Contacts5
Reach Compliance Codenot_compliant
seriesAHC/VHC
JESD-30 codeR-PDSO-G5
JESD-609 codee0
length2 mm
Logic integrated circuit typeAND GATE
MaximumI(ol)0.008 A
Number of functions1
Number of entries2
Number of terminals5
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP5/6,.08
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)240
power supply2/5.5 V
Prop。Delay @ Nom-Sup11 ns
propagation delay (tpd)16.5 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1.25 mm

MC74VHC1G08DFT4 Preview

MC74VHC1G08
Single 2-Input AND Gate
The MC74VHC1G08 is an advanced high speed CMOS 2−input
AND gate fabricated with silicon gate CMOS technology.
The internal circuit is composed of multiple stages, including a
buffer output which provides high noise immunity and stable output.
The MC74VHC1G08 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G08 to be used to interface 5.0 V circuits to
3.0 V circuits.
Features
http://onsemi.com
MARKING
DIAGRAMS
5
SC−88A / SOT−353 / SC−70
DF SUFFIX
CASE 419A
V2 M
G
G
M
•
•
•
•
•
•
•
•
High Speed: t
PD
= 3.5 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 1.0
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 62
These Devices are Pb−Free and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
1
5
TSOP−5 / SOT−23 / SC−59
DT SUFFIX
CASE 483
V2 M
G
G
1
V2
= Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
IN B
1
5
V
CC
PIN ASSIGNMENT
IN A
2
1
2
3
GND
3
4
OUT Y
4
5
IN B
IN A
GND
OUT Y
V
CC
Figure 1. Pinout
(Top View)
FUNCTION TABLE
Inputs
A
B
L
H
L
H
Output
Y
L
L
L
H
IN A
IN B
&
OUT Y
Figure 2. Logic Symbol
L
L
H
H
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
©
Semiconductor Components Industries, LLC, 2013
February, 2013
−
Rev. 20
1
Publication Order Number:
MC74VHC1G08/D
MC74VHC1G08
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
T
STG
T
L
T
J
q
JA
P
D
MSL
F
R
V
ESD
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Thermal Resistance
Power Dissipation in Still Air at 85°C
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 28 to 34
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Above V
CC
and Below GND at 125°C (Note 5)
SC70−5/SC−88A (Note 1)
TSOP−5
SC70−5/SC−88A
TSOP−5
Parameter
Value
*0.5
to
)7.0
−0.5
to +7.0
*0.5
to V
CC
)0.5
−20
$20
$12.5
$25
*65
to
)150
260
)150
350
230
150
200
Level 1
UL 94 V−0 @ 0.125 in
u2000
u200
N/A
$500
V
Unit
V
V
V
mA
mA
mA
mA
°C
°C
°C
°C/W
mW
I
LATCHUP
Latchup Performance
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
t
r
, t
f
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature Range
Input Rise and Fall Time
V
CC
= 3.3 V
±
0.3 V
V
CC
= 5.0 V
±
0.5 V
NORMALIZED FAILURE RATE
Characteristics
Min
2.0
0.0
0.0
−55
0
0
Max
5.5
5.5
V
CC
+125
100
20
Unit
V
V
V
°C
ns/V
Device Junction Temperature versus
Time to 0.1% Bond Failures
Junction
Temperature
°C
80
90
100
110
120
130
140
Time, Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time, Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130
°
C
TJ = 120
°
C
TJ = 100
°
C
TJ = 110
°
C
TJ = 80
°
C
100
TIME, YEARS
TJ = 90
°
C
1
1
10
1000
Figure 3. Failure Rate vs. Time
Junction Temperature
http://onsemi.com
2
MC74VHC1G08
DC ELECTRICAL CHARACTERISTICS
Symbol
V
IH
Parameter
Minimum High−Level
Input Voltage
Test Conditions
V
CC
(V)
2.0
3.0
4.5
5.5
2.0
3.0
4.5
5.5
V
IN
= V
IH
or V
IL
I
OH
=
−50
mA
V
IN
= V
IH
or V
IL
I
OH
=
−4
mA
I
OH
=
−8
mA
V
OL
Maximum Low−Level
Output Voltage
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
I
OL
= 50
mA
V
IN
= V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 8 mA
I
IN
I
CC
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to 5.5
5.5
1.9
2.9
4.4
2.58
3.94
0.0
0.0
0.0
0.1
0.1
0.1
0.36
0.36
$0.1
1.0
2.0
3.0
4.5
T
A
= 255C
Min
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
$1.0
10
Typ
Max
T
A
v
855C
Min
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
1.9
2.9
4.4
2.34
3.66
0.1
0.1
0.1
0.52
0.52
$1.0
40
mA
mA
V
Max
*555C
to 1255C
Min
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
Max
Unit
V
V
IL
Maximum Low−Level
Input Voltage
V
V
OH
Minimum High−Level
Output Voltage
V
IN
= V
IH
or V
IL
V
ÎÎ Î Î Î Î ÎÎ Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î
Î
Î
Î Î Î Î Î ÎÎ Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î Î ÎÎ Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î Î ÎÎ Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î ÎÎ Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î ÎÎ Î
Î
Î
Î Î Î Î Î ÎÎ Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î ÎÎ Î
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
Î
Î
Î
T
A
= 25°C
Typ
4.1
5.9
3.5
4.2
5.5
T
A
≤
85°C
−55
≤
T
A
≤
125°C
Min
Max
12.5
16.5
9.0
11.0
10
Symbol
t
PLH
,
t
PHL
Parameter
Test Conditions
Min
Max
Min
Max
Unit
ns
Maximum Propaga-
tion Delay,
Input A or B to Y
V
CC
= 3.3
±
0.3 V
V
CC
= 5.0
±
0.5 V
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
8.8
12.3
5.9
7.9
10
10.5
14.0
7.0
9.0
10
C
IN
Maximum Input Ca-
pacitance
pF
Typical @ 25°C, V
CC
= 5.0 V
11
C
PD
Power Dissipation Capacitance (Note 6)
pF
6. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD

V
CC

f
in
+ I
CC
. C
PD
is used to determine the no−load dynamic
power consumption; P
D
= C
PD

V
CC2

f
in
+ I
CC

V
CC
.
AC ELECTRICAL CHARACTERISTICS
Input t
r
= t
f
= 3.0 ns
http://onsemi.com
3
MC74VHC1G08
V
CC
INPUT
GND
t
PLH
Output Y
50% V
CC
t
PHL
V
OH
V
OL
*Includes all probe and jig capacitance.
A 1−MHz square input wave is recommended
for propagation delay tests.
C
L*
OUTPUT
Input A or B
50%
50% V
CC
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device
MC74VHC1G08DFT1G
NLVVHC1G08DFT1G*
MC74VHC1G08DFT2G
NLVVHC1G08DFT2G*
MC74VHC1G08DTT1G
SOT23−5/TSOP−5/SC59−5
(Pb−Free)
SC70−5/SC−88A/SOT−353
(Pb−Free)
Package
Shipping
†
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
http://onsemi.com
4
MC74VHC1G08
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
A
G
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
---
0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
---
0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
5
4
S
1
2
3
−B−
D
5 PL
0.2 (0.008)
M
B
M
N
J
C
DIM
A
B
C
D
G
H
J
K
N
S
H
K
http://onsemi.com
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MC74VHC1G08DFT4 Related Products

MC74VHC1G08DFT4 MC74VHC1G08DTT3 MC74VHC1G08DTR2 MC74VHC1G08DFR2 MC74VHC1G08DTT2
Description AHC/VHC SERIES, 2-INPUT AND GATE, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN AHC/VHC SERIES, 2-INPUT AND GATE, PDSO5, SC-59, SOT-23, TSOP-5 AHC/VHC SERIES, 2-INPUT AND GATE, PDSO5, SC-59, SOT-23, TSOP-5 AHC/VHC SERIES, 2-INPUT AND GATE, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN AHC/VHC SERIES, 2-INPUT AND GATE, PDSO5, SC-59, SOT-23, TSOP-5
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible
Maker ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor
Parts packaging code SOT-353 TSOP TSOP SOT-353 TSOP
package instruction TSSOP, TSSOP5/6,.08 TSOP, TSOP5/6,.11,37 SC-59, SOT-23, TSOP-5 SC-70, SC-88A, SOT-353, 5 PIN TSOP, TSOP5/6,.11,37
Contacts 5 5 5 5 5
Reach Compliance Code not_compliant not_compliant unknown unknown unknown
series AHC/VHC AHC/VHC AHC/VHC AHC/VHC AHC/VHC
JESD-30 code R-PDSO-G5 R-PDSO-G5 R-PDSO-G5 R-PDSO-G5 R-PDSO-G5
JESD-609 code e0 e0 e0 e0 e0
length 2 mm 3 mm 3 mm 2 mm 3 mm
Logic integrated circuit type AND GATE AND GATE AND GATE AND GATE AND GATE
MaximumI(ol) 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A
Number of functions 1 1 1 1 1
Number of entries 2 2 2 2 2
Number of terminals 5 5 5 5 5
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C -55 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSOP TSOP TSSOP TSOP
Encapsulate equivalent code TSSOP5/6,.08 TSOP5/6,.11,37 TSOP5/6,.11,37 TSSOP5/6,.08 TSOP5/6,.11,37
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE
method of packing TAPE AND REEL TAPE AND REEL TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 240 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply 2/5.5 V 2/5.5 V 2/5.5 V 2/5.5 V 2/5.5 V
Prop。Delay @ Nom-Sup 11 ns 11 ns 16.5 ns 16.5 ns 16.5 ns
propagation delay (tpd) 16.5 ns 16.5 ns 16.5 ns 16.5 ns 16.5 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Schmitt trigger NO NO NO NO NO
Maximum seat height 1.1 mm 1.1 mm 1.1 mm 1.1 mm 1.1 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 2 V 2 V 2 V 2 V 2 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3 V 3 V 3 V
surface mount YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.95 mm 0.95 mm 0.65 mm 0.95 mm
Terminal location DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 1.25 mm 1.5 mm 1.5 mm 1.25 mm 1.5 mm
Is it lead-free? - - Contains lead Contains lead Contains lead

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