74LS18J datasheet, PDF - EEWORLD Datasheet

74LS18J: DescriptionLS SERIES, DUAL 4-INPUT NAND GATE, CDIP14; Categorylogic logic; File Size87KB，5 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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74LS18J Overview

LS SERIES, DUAL 4-INPUT NAND GATE, CDIP14

Parameter Name	Attribute value
Maker	Texas Instruments
package instruction	DIP,
Reach Compliance Code	unknown
series	LS
JESD-30 code	R-GDIP-T14
length	19.56 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	NAND GATE
Number of functions	2
Number of entries	4
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Maximum supply current (ICC)	10 mA
propagation delay (tpd)	55 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm

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