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MT5C1009W-70LXT

Description
Standard SRAM, 128KX8, 70ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32
Categorystorage    storage   
File Size115KB,10 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Download Datasheet Parametric View All

MT5C1009W-70LXT Overview

Standard SRAM, 128KX8, 70ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32

MT5C1009W-70LXT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMicron Technology
Parts packaging codeDIP
package instruction0.600 INCH, PLASTIC, DIP-32
Contacts32
Reach Compliance Codenot_compliant
ECCN code3A001.A.2.C
Maximum access time70 ns
Other featuresAUTOMATIC POWER-DOWN
I/O typeCOMMON
JESD-30 codeR-PDIP-T32
JESD-609 codee0
length41.91 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of ports1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize128KX8
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP32,.6
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
power supply5 V
Certification statusNot Qualified
Maximum seat height5.59 mm
Maximum standby current0.0002 A
Minimum standby current2 V
Maximum slew rate0.11 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width15.24 mm
OBSOLETE
MT5C1009
SRAM
FEATURES
High speed: 20, 25, 35, 45, 55 and 70ns
Automatic Chip Enable power down
All inputs and outputs are TTL compatible
High-performance, low-power CMOS double-metal
process
• Single +5V
±10%
power supply
• Fast Output Enable access time: 8ns
• Replaces industry standard 128K x 8 multichip SRAM
module
128K x 8 SRAM
WITH SINGLE CHIP ENABLE
PIN ASSIGNMENT (Top View)
32-Pin DIP
(A-12, A-13)
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
NC
WE
A13
A8
A9
A11
OE
A10
CE
DQ8
DQ7
DQ6
DQ5
DQ4
OPTIONS
MARKING
• Timing
20ns access
-20
25ns access
-25
35ns access
-35
45ns access
-45
55ns access
-55*
70ns access
-70*
*Electrical characteristics identical to those provided
for the 45ns device.
• Packages
Plastic DIP (400 mil)
None
Plastic DIP (600 mil)
W
Plastic SOJ (400 mil)
DJ
Available in ceramic packages tested to meet military
specifications. Please refer to Micron’s
Military Data
Book.
• 2V data retention
• Temperature
Industrial
(-40°C to +85°C)
Automotive (-40°C to +125°C)
Extended
(-55°C to +125°C)
L
32-Pin SOJ
(E-11)
NC
A16
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
NC
WE
A13
A8
A9
A11
OE
A10
CE
DQ8
DQ7
DQ6
DQ5
DQ4
IT
AT
XT
A2
A1
A0
DQ1
DQ2
DQ3
Vss
GENERAL DESCRIPTION
The Micron SRAM family employs high-speed, low-
power CMOS designs using a four-transistor memory cell.
Micron SRAMs are fabricated using double-layer metal,
double-layer polysilicon technology.
Writing to these devices is accomplished when write
enable (?W
/
E) and
/
C
/
E inputs are both LOW. Reading is
MT5C1009
REV. 11/91
accomplished when
?
W
/
E remains HIGH and
/
C
/
E goes LOW.
The device offers a reduced power standby mode when
disabled. This allows system designers to achieve their low
standby power requirements.
All devices operate from a single +5V power supply and
all inputs and outputs are fully TTL compatible.
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©1991,
Micron Technology, Inc.
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