Preliminary Data Sheet No. PD60043J
IR2101/IR21014
IR2102/IR21024
HIGH AND LOW SIDE DRIVER
Features
•
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
5V Schmitt-triggered input logic
Matched propagation delay for both channels
Outputs in phase with inputs (IR2101/IR21014) or
out of phase with inputs (IR2102/IR21024)
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
(typ.)
Delay Matching
600V max.
130 mA / 270 mA
10 - 20V
160 & 150 ns
50 ns
•
•
•
•
•
Description
The IR2101/IR21014/IR2102/IR21024 are high voltage,
high speed power MOSFET and IGBT drivers with in-
dependent high and low side referenced output chan-
nels. Proprietary HVIC and latch immune CMOS tech-
nologies enable ruggedized monolithic construction. The
logic input is compatible with standard CMOS or LSTTL
output. The output drivers feature a high pulse current
buffer stage designed for minimum driver cross-conduc-
tion. The floating channel can be used to drive an N-
channel power MOSFET or IGBT in the high side con-
figuration which operates up to 600 volts.
Packages
8 Lead SOIC
14 Lead SOIC
8 Lead PDIP
14 Lead PDIP
Typical Connection
up to 600V
V
CC
V
CC
HIN
LIN
V
B
HO
V
S
LO
up to 600V
V
CC
TO
LOAD
HIN
LIN
COM
IR2101
V
CC
HIN
LIN
V
B
HO
V
S
LO
TO
LOAD
HIN
LIN
COM
IR2102
IR2101/IR21014/IR2102/IR21024
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dV
S
/dt
P
D
Definition
High side floating supply voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (HIN & LIN)
Allowable offset supply voltage transient
Package power dissipation @ T
A
≤
+25°C
(8 lead PDIP)
(8 lead SOIC)
(14 lead PDIP)
(14 lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
-0.3
—
—
—
—
—
—
—
—
—
—
-55
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
50
1.0
0.625
1.6
1.0
125
200
75
120
150
150
300
Units
V
V/ns
W
Rth
JA
Thermal resistance, junction to ambient
(8 lead PDIP)
(8 lead SOIC)
(14 lead PDIP)
(14 lead SOIC)
°C/W
T
J
T
S
T
L
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102)
Ambient temperature
Min.
V
S
+ 10
Note 1
V
S
10
0
0
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
V
CC
125
Units
V
°C
Note 1:
Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
.
2
IR2101/IR21014/IR2102/IR21024
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified.
Symbol
ton
toff
tr
tf
MT
Definition
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
Delay matching, HS & LS turn-on/off
Min. Typ. Max. Units Test Conditions
—
—
—
—
—
160
150
100
50
—
220
220
170
90
50
ns
V
S
= 0V
V
S
= 600V
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to
COM. The V
O
and I
O
parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
V
IH
V
IL
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
CCUV-
I
O+
Definition
Logic “1” input voltage (IR2101)
Logic “0” input voltage (IR2102)
Logic “0” input voltage (IR2101)
Logic “1”input voltage (IR2102)
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
supply undervoltage positive going
threshold
V
CC
supply undervoltage negative going
threshold
Output high short circuit pulsed current
Min. Typ. Max. Units Test Conditions
3
—
—
—
—
—
—
—
—
—
—
—
—
30
150
3
—
V
0.8
100
100
50
55
270
10
µA
mV
V
CC
= 10V to 20V
I
O
= 0A
I
O
= 0A
V
B
= V
S
= 600V
V
IN
= 0V or 5V
V
IN
= 0V or 5V
V
IN
= 5V (IR2101)
V
IN
= 0V (IR2102)
—
8
7.4
130
—
8.9
8.2
210
1
9.8
9
—
mA
V
V
IN
= 0V (IR2101)
V
IN
= 5V (IR2102)
V
CC
= 10V to 20V
V
O
= 0V
V
IN
= Logic “1”
PW
≤
10 µs
V
O
= 15V
V
IN
= Logic “0”
PW
≤
10 µs
I
O-
Output low short circuit pulsed current
270
360
—
3
IR2101/IR21014/IR2102/IR21024
Functional Block Diagram
V
B
Q
PULSE
FILTER
R
S
V
S
HO
HV
LEVEL
SHIFT
HIN
PULSE
GEN
UV
DETECT
V
CC
LIN
LO
COM
IR2101/IR21014
V
B
Q
PULSE
FILTER
R
S
V
S
HO
v
cc
15V
HIN
PULSE
GEN
HV
LEVEL
SHIFT
v
cc
15V
LIN
UV
DETECT
V
CC
LO
COM
IR2102/IR21024
4
IR2101/IR21014/IR2102/IR21024
Lead Definitions
Symbol
HIN
HIN
LIN
LIN
V
B
HO
V
S
V
CC
LO
COM
Description
Logic input for high side gate driver output (HO), in phase (IR2101)
Logic input for high side gate driver output (HO), out of phase (IR2102)
Logic input for low side gate driver output (LO), in phase (IR2101)
Logic input for low side gate driver output (LO), out of phase (IR2102)
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
Lead Assignments IR2101
8 Lead PDIP
8 Lead SOIC
IR2101
IR2101S
1
2
3
4
5
6
7
VCC
HIN
LIN
COM
LO
VB
HO
VS
1
4
13
12
11
10
9
8
1
2
3
4
5
6
7
VCC
HIN
LIN
COM
LO
VB
HO
VS
14
13
12
11
10
9
8
14 Lead PDIP
14 Lead SOIC
IR21014
5
IR21014S
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