FINAL
Am7996
IEEE 802.3/Ethernet/Cheapernet Transceiver
DISTINCTIVE CHARACTERISTICS
s
Compatible with Ethernet Version 2 and
IEEE 802.3 10BASE-5 and10BASE-2
specifications
s
Pin-selectable SQE Test (heartbeat) option
s
Internal jabber controller prevents excessive
transmission time
s
Noise rejection filter ensures that only valid data
is transmitted onto the network
s
Collision detection on both transmit and receive
data
s
Collision detect threshold levels adjustable for
other networking applications
GENERAL DESCRIPTION
The Am7996 IEEE 802.3/Ethernet/Cheapernet Trans-
ceiver suppor ts Ethernet Version 2, IEEE 802.3
10BASE-5 and IEEE 802.3 10BASE-2—Cheapernet)
transceiver applications. Transmit, receive, and colli-
sion detect functions at the coaxial media interface to
the data terminal equipment (DTE) are all performed by
this single device.
In an IEEE 802.3 (10BASE-5)/Ethernet application, the
Am7996 interfaces the coaxial (0.4
″
diameter) media to the
DTE through an isolating pulse transformer and the 78
Ω
attachment unit interface (AUI) cable. In IEEE 802.3
10BASE-2—Cheapernet applications, the Am7996 typi-
cally resides inside the DTE with its signals to the DTE iso-
lated and the coaxial (0.2
″
diameter) media directly
connected to the DTE. Transceiver power and ground in
both applications are isolated from that of the DTE.
The Am7996’s tap driver provides controlled skew and
current drive for data signaling onto the media. The jabber
controller prevents the node from transmitting exces-
sively. While transmitting, collisions on the media are de-
tected if one or more additional stations are transmitting.
The Am7996 features an optional SQE Test function
that provides a signal on the Cl pair at the end of every
transmission. The SQE Test indicates the operational
status of the Cl pair to the DTE. It can also serve as an
acknowledgment to the node that packet transmission
onto the coax was completed.
BLOCK DIAGRAM
Carrier
Detect
Circuit
DI+
DI–
Line
Driver
Control
Logic
Receive
Data
Amplifier
Collision
Detect
Circuit
Line
Driver
Control
Logic
Jabber
Timer
SQE Test
Generator
Input
Buffer
RXT
Coaxial Media Interface
AUI Interface
CI+
CI–
Transmit
Squelch
DO+
DO–
SQE TEST
Publication#
07506
Rev:
E
Amendment/0
Issue Date:
May 1994
Input
Buffer
Transmit
Data
Amplifier
Tap
Driver
TXT
07506E-1
1
AMD
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Description
Twisted Pair Ethernet Transceiver (TPEX)
Twisted Pair Ethernet Transceiver Plus (TPEX+)
Integrated Multiport Repeater Plus™ (IMR+™)
Hardware Implemented Management Information Base™ (HIMIB™)
Media Access Controller for Ethernet (MACE™)
CMOS Local Area Network Controller for Ethernet (C-LANCE)
Integrated Local Area Communications Controller™ (ILACC™)
PCnet-ISA Single-Chip Ethernet Controller (for ISA bus)
PCnet-ISA
+
Single-Chip Ethernet Controller (with Microsoft
®
Plug n’ Play
®
Support)
PCnet-32 Single-Chip 32-Bit Ethernet Controller (for 386DX, 486 and VL buses)
PCnet-PCI Single-Chip Ethernet Controller (for PCI bus)
PCnet-SCSI Combination Ethernet and SCSI Controller for PCI Systems
CONNECTION DIAGRAMS
DIP
V
CC1
CI+
CI–
DI+
DI–
VC
REF
SQE^TEST
DO+
DO–
V
EE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC2
COLL OSC
V
COL
NC
RXT
NC
TAP SHIELD
V
TX–
TXT
V
TX+
DI+
DI–
VC
REF
SQE^TEST
DO+
CI+
V
CC1
V
CC2
CI–
PLCC
COLL OSC
V
COL
NC
RXT
NC
TAP SHIELD
3 2 1 20 19
18
4
17
5
16
6
7
15
8
14
9 10 11 12 13
DO–
V
EE
V
TX+
TXT
V
TX–
07506E-2
07506E-3
Notes:
Pin 1 is marked for orientation.
NC = No Connection
2
Am7996
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (valid combination) is formed
by a combination of the elements below.
AM7996
D
C
B
OPTIONAL PROCESSING
Blank = Standard Processing
B = Burn-In
TR = Tape and Reel Packaging
OPERATING CONDITIONS
C = Commercial (0°C to +70°C)
PACKAGE TYPE
P = 20-Pin Plastic DIP (PD 020)
D = 20-Pin Ceramic DIP (CD 020)
J = 20-Pin Plastic Leaded Chip Carrier (PL 020)
SPEED
Not Applicable
DEVICE NUMBER/DESCRIPTION
Am7996
IEEE 802.3/Ethernet/Cheapernet Transceiver
Valid Combinations
AM7996
PC, PCB, DC, DCB,
JC, JCTR
Valid Combinations
Valid combinations list configurations planned to be sup-
ported in volume for this device. Consult the local AMD sales
office to confirm availability of specific valid combinations and
to check on newly released combinations.
Am7996
3
PIN DESCRIPTION
Attachment Unit Interface (AUI)
Dl+, Dl–
Receive Line Output (Differential Outputs)
This pair is intended to operate into terminated 78
Ω
transmission lines. Signals at RXT meeting bandwidth
requirements and carrier sense levels are outputted at
Dl
±
. Signaling at Dl
±
meets requirements of
IEEE 802.3, Rev. D.
Global Signals
VC
REF
Timing Reference Set (Input)
VC
REF
is a compensated voltage reference input with
respect to V
EE
. When a resistor is connected between
VC
REF
and V
EE
, then internal transmit and receive
squelch timing, SQE oscillator frequency, and receive
and SQE output drive levels are set. SQE frequency
set is also determined by components connected be-
tween V
CC1
and COLL OSC.
Cl+, Cl–
Collision Line Output (Differential Outputs)
This pair is intended to operate into terminated 78
Ω
transmission lines. Signal Quality Error (SQE), de-
tected at DO
±
inputs (excessive transmissions) or RXT
input (during a collision), outputs the 10 MHz internal
oscillator signal to the AUI interface. For proper compo-
nent values at COLL OSC, signaling at Cl
±
meets re-
quirements of IEEE 802.3, Rev. D.
SQE TEST
Signal Quality Error Test Enable (Input)
The SQE Test function is enabled by connecting the
SQE TEST pin to V
EE
and disabled by connecting to V
CC
.
V
TX+
, V
TX–
Tap Node Driver Current Set (Inputs)
A reference input for transmission level and external re-
dundant jabber. Transmit level is set by an external re-
sistor between V
TX+
and V
TX–
(for an 80 mA peak level,
R = 9.09
Ω
). V
TX–
may be operated between V
EE
and
V
EE
+ 1 V. When the voltage at V
TX–
goes more positive
than V
EE
+ 2 V, TXT is disabled and an SQE message
is output at the Cl pair.
DO+, DO–
Transmit Input (Differential Inputs)
A pair of internally biased line receivers consisting of a
squelch detect receiver with offset and noise filtering
and a data receiver with zero offset for data signal pro-
cessing. Signals meeting squelch requirements are
waveshaped and output at TXT.
TAP SHIELD
Low-Noise Media Cable Return (Input)
This input is the return for V
COL
reference and the re-
ceive signal from the media. External connection is to
a positive power supply.
Coaxial Media Interface (TAP)
RXT
Media Signal Receiver Input (Input)
RXT connects to the media through a 4:1 attenuator of
100 k
Ω
total resistance (25 k
Ω
and 75 k
Ω
in series).
Return for the attenuator is V
COL
. RXT is an analog
input with internal AC coupling for Manchester data sig-
nals and direct coupling for Carrier Detect and SQE av-
erage level detection. Signals at RXT meeting carrier
squelch enable data to the Dl
±
outputs. Data signals
are AC coupled to Dl
±
with a 150 ns time constant,
high-pass filter. Signals meeting SQE levels enable
COLL OSC frequency to Cl
±
outputs.
V
COL
SQE Reference Voltage (Bias Supply)
SQE sense voltage and RXT input amplifier reference.
An internally set analog reference for SQE level and data
signal set at –1.600 V nominal with a source resistance
of 150
Ω
nominal. This reference should be filtered with
respect to TAP SHIELD (see Applications section for ad-
justing threshold levels for other applications).
COLL OSC
SQE Timing Set (Input)
Timing input for SQE oscillator. For a properly set input
at VC
REF
, SQE oscillator period is set at 2.1RC. For a
10 MHz SQE oscillator frequency, R should be 1 k
Ω
and
C 47 pF, including interconnect and device capacitance.
TXT
Tap Node Driver (Input/Output)
A controlled bandwidth current source and sense am-
plifier. This l/O port is to be connected to the media
through an isolation network and a low-pass filter. Sig-
nals meeting DO
±
squelch and jabber timing require-
ments are output at TXT as a controlled rise and fall
time current pulse. When operated into a double termi-
nated 50
Ω
transmission line, signaling meets
IEEE 802.3, Rev. D recommendations for amplitude,
pulse-width distortion, rise and fall times, and harmonic
content. The sense amplifier monitors TXT faults and
inhibits transmission.
V
CC1
Positive Logic Supply
V
CC2
SQE Timing Reference (Positive Supply Voltage)
Timing reference return for SQE oscillator and analog
signal ground.
V
EE
Negative Logic Supply and IC Substrate
4
Am7996
FUNCTIONAL DESCRIPTION
The Am7996 IEEE 802.3/Ethernet/Cheapernet Trans-
ceiver consists of four sections: 1) Transmit—receives
signals from DTE and sends it to the coaxial medium;
2) Receive—obtains data from media and sends it to
DTE; 3) Collision Detect—indicates to DTE any colli-
sion on the media; and 4) Jabber—guards medium
from node transmissions that are excessive in length.
data to the differential line driver within five bit times
from the start of the packet.
Received data is transmitted from the Dl pair through
an isolation transformer to the AUI cable (Ethernet/
lEEE 802.3—10BASE-5). In IEEE 802.3 10BASE-2—
Cheapernet, the AUI cable is optional. Following the
last transition of the packet, the Dl pair is held HIGH for
two bit times and then decreases to idle level within
twenty bit times.
Transmit
The Am7996 receives differential signals from the DTE
(in the case of Am7990 family applications, from the
Am7992 —serial interface adapter—SIA). For IEEE
(10BASE-5)/Ethernet applications, this signal is re-
ceived through the AUI cable and isolation transformer.
In IEEE 802.3 10BASE-2—Cheapernet applications,
the AUI cable is optional.
Data is received through a noise rejection filter that re-
jects signals with pulse widths less than 7 ns (negative
going), or with levels less than 175 mV peak. Only sig-
nals greater than –275 mV peak from the DTE are en-
abled. This minimizes false starts due to noise and
ensures that no valid packets are missed.
The Am7996’s tap driver provides the driving capability
to ensure adequate signal level at the end of the maxi-
mum length network segment (500 meters) under the
worst-case number of connections (100 nodes). Re-
quired rise and fall times of data transmitted on the net-
work are maintained by the Am7996 Tap Driver. The tap
driver’s output is connected to the media through exter-
nal isolating diodes. To safeguard network integrity, the
driver is disabled whenever power falls below the mini-
mum operation voltage.
During transmission, the Am7996 Jabber Controller
monitors the duration that the transmit tap driver is ac-
tive and disables the driver if the jabber time is ex-
ceeded. This prevents network tie-up due to a
“babbling” transceiver. Once disabled, the driver is not
reset until 400 ms after the DO pair is idle and there is
no fault on TXT. During the disable time, an SQE signal
is sent on the Cl pair to the DTE.
When SQE TEST is tied to V
EE
, the Am7996 generates
an SQE message at the end of every transmission. This
signal is a self-test indication to the DTE that the media
attachment unit (MAU) collision pair is operational.
Collision Detect
The Am7996 detects collisions on transmit if one or
more additional stations are transmitting on the network.
Received signals are compared against the collision
threshold reference. If the level is more negative than
the reference, an enable signal is generated to the Cl
pair. The collision threshold can be modified by
external components.
The collision oscillator is a 10 MHz oscillator that drives
the differential Cl pair to the DTE through an isolation
transformer.
This signal is gated to the Cl pair whenever there is a
collision, the SQE Test is in progress, or the jabber con-
troller is activated. The oscillator is also utilized in
counting time for the jabber timer and SQE Test.
The Cl
±
output meets the drive requirements for the
AUI interface. The output stays HIGH for two bit times
at the end of the packet, decreasing to the idle level
within twenty bit times.
Jabber Function
The Am7996 Jabber Timer monitors the activity on the
DO pair and senses TXT faults. It inhibits transmission
if the tap driver is active for longer than the jabber time
(26 ms). An SQE message (10 MHz collision signal), is
enabled on the Cl pair for the fault duration.
After the fault is removed, the jabber timer counts the
unjab time of 400 ms before it enables the driver.
If desired, a redundant jabber function can be imple-
mented externally, and the output driver disabled by re-
moving the driver supply at V
TX–
.The Am7996 senses
this condition and forces an SQE message on the Cl
pair during the disable time.
SQE Test
An SQE Test will occur at the end of every transmission
if the SQE TEST pin is tied to V
EE
. The SQE Test signal
is a gated 10 MHz signal to the Cl pair. The SQE Test en-
sures that the twisted-pair assigned for collision notifica-
tion to the DTE is intact and operational. The SQE Test
starts eight bit times after the last transition of the trans-
mitted signal and lasts for a duration of eight bit times.
The SQE Test can be disabled by connecting the
SQE TEST pin to V
CC
.
Receive and Carrier Detect
Signal is acquired from the tap through a high-
impedance (100 k
Ω
) resistive divider. A high input-
impedance (low capacitance, high bandwidth, low
noise) DC-coupled input amplifier in the Am7996 re-
ceives the signal. The received signal passes through
a high-pass filter to minimize inter-symbol distortion,
and then through a data slicer. The Am7996 Carrier
Detect compares received signals to a reference.
Signals meeting carrier squelch requirements enable
Am7996
5
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