AT49BV802AT-70CJ datasheet, PDF

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AT49BV802AT-70CJ: DescriptionFlash, 512KX16, 70ns, PBGA48, 6 X 8 MM, 1 MM HIEGHT, 0.80 MM PITCH, PLASTIC, CBGA-48; Categorystorage storage; File Size454KB，31 Pages; ManufacturerAtmel (Microchip); Environmental Compliance

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AT49BV802AT-70CJ Overview

Flash, 512KX16, 70ns, PBGA48, 6 X 8 MM, 1 MM HIEGHT, 0.80 MM PITCH, PLASTIC, CBGA-48

AT49BV802AT-70CJ Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Atmel (Microchip)
Parts packaging code	BGA
package instruction	6 X 8 MM, 1 MM HIEGHT, 0.80 MM PITCH, PLASTIC, CBGA-48
Contacts	48
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	70 ns
Spare memory width	8
startup block	TOP
JESD-30 code	R-PBGA-B48
JESD-609 code	e1
length	8 mm
memory density	8388608 bit
Memory IC Type	FLASH
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
Programming voltage	3 V
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.65 V
Nominal supply voltage (Vsup)	2.7 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
type	NOR TYPE
width	6 mm

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Features

•

Single Voltage Read/Write Operation: 2.65V to 3.6V

•

Access Time – 70 ns

•

Sector Erase Architecture

– Fifteen 32K Word (64K Bytes) Sectors with Individual Write Lockout

– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout

Fast Byte/Word Program Time – 12 µs

Fast Sector Erase Time – 300 ms

Suspend/Resume Feature for Erase and Program

– Supports Reading and Programming from Any Sector by Suspending Erase

of a Different Sector

– Supports Reading Any Byte/Word in the Non-suspending Sectors by Suspending

Programming of Any Other Byte/Word

Low-power Operation

– 12 mA Active

– 13 µA Standby

Data Polling, Toggle Bit, Ready/Busy for End of Program Detection

RESET Input for Device Initialization

Sector Lockdown Support

TSOP and CBGA Package Options

Top or Bottom Boot Block Configuration Available

128-bit Protection Register

Minimum 100,000 Erase Cycles

Common Flash Interface (CFI)

Green (Pb/Halide-free) Packaging Option

•

8-megabit

(512K x 16/

1M x 8)

3-volt Only

Flash Memory

AT49BV802A

AT49BV802AT

Not Recommended

for New Design

Contact

Atmel to discuss

the latest design in trends

and options

1. Description

The AT49BV802A(T) is a 2.7-volt 8-megabit Flash memory organized as 524,288

words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on

I/O0 - I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided into 23 sec-

tors for erase operations. The AT49BV802A(T) is offered in a 48-lead TSOP and a

48-ball CBGA package. The device has CE and OE control signals to avoid any bus

contention. This device can be read or reprogrammed using a single power supply,

making it ideally suited for in-system programming.

The device powers on in the read mode. Command sequences are used to place the

device in other operation modes such as program and erase. The device has the

capability to protect the data in any sector (see

“Sector Lockdown”

section).

To increase the flexibility of the device, it contains an Erase Suspend and Program

Suspend feature. This feature will put the erase or program on hold for any amount of

time and let the user read data from or program data to any of the remaining sectors

within the memory. The end of a program or an erase cycle is detected by the

READY/BUSY pin, Data Polling or by the toggle bit.

3405E–FLASH–2/07

AT49BV802A(T)

4.3

Reset

A RESET input pin is provided to ease some system applications. When RESET is at a logic

high level, the device is in its standard operating mode. A low level on the RESET input halts the

present device operation and puts the outputs of the device in a high impedance state. When a

high level is reasserted on the RESET pin, the device returns to the read or standby mode,

depending upon the state of the control inputs.

4.4

Erasure

Before a byte/word can be reprogrammed, it must be erased. The erased state of memory bits is

a logical “1”. The entire device can be erased by using the Chip Erase command or individual

sectors can be erased by using the Sector Erase command.

4.4.1

Chip Erase

The entire device can be erased at one time by using the six-byte chip erase software code.

After the chip erase has been initiated, the device will internally time the erase operation so that

no external clocks are required. The maximum time to erase the chip is t

If the sector lockdown has been enabled, the chip erase will not erase the data in the sector that

has been locked out; it will erase only the unprotected sectors. After the chip erase, the device

will return to the read or standby mode.

4.4.2

Sector Erase

As an alternative to a full chip erase, the device is organized into 23 sectors (SA0 - SA22) that

can be individually erased. The Sector Erase command is a six-bus cycle operation. The sector

address is latched on the falling WE edge of the sixth cycle while the 30H data input command is

latched on the rising edge of WE. The sector erase starts after the rising edge of WE of the sixth

cycle. The erase operation is internally controlled; it will automatically time to completion. The

maximum time to erase a sector is t

SEC

. When the sector programming lockdown feature is not

enabled, the sector will erase (from the same Sector Erase command). An attempt to erase a

sector that has been protected will result in the operation terminating immediately.

4.5

Byte/Word Programming

Once a memory block is erased, it is programmed (to a logical “0”) on a byte-by-byte or on a

word-by-word basis. Programming is accomplished via the internal device command register

and is a four-bus cycle operation. The device will automatically generate the required internal

program pulses.

Any commands written to the chip during the embedded programming cycle will be ignored. If a

hardware reset happens during programming, the data at the location being programmed will be

corrupted. Please note that a data “0” cannot be programmed back to a “1”; only erase opera-

tions can convert “0”s to “1”s. Programming is completed after the specified t

cycle time. The

Data Polling feature or the Toggle Bit feature may be used to indicate the end of a program

cycle. If the erase/program status bit is a “1”, the device was not able to verify that the erase or

program operation was performed successfully.

3405E–FLASH–2/07

AT49BV802AT-70CJ Related Products

	AT49BV802AT-70CJ	AT49BV802AT-70CU	AT49BV802AT-70TJ	AT49BV802A-70CJ	AT49BV802A-70TJ
Description	Flash, 512KX16, 70ns, PBGA48, 6 X 8 MM, 1 MM HIEGHT, 0.80 MM PITCH, PLASTIC, CBGA-48	Flash memory 8M top boot-pkg- 8M top boot	Flash, 512KX16, 70ns, PDSO48, 12 X 20 MM, PLASTIC, MO-142DD, TSOP1-48	Flash, 512KX16, 70ns, PBGA48, 6 X 8 MM, 1 MM HIEGHT, 0.80 MM PITCH, PLASTIC, CBGA-48	Flash, 512KX16, 70ns, PDSO48, 12 X 20 MM, PLASTIC, MO-142DD, TSOP1-48
Maker	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)
Maximum operating temperature	85 °C	+ 85 C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	- 40 C	-40 °C	-40 °C	-40 °C
organize	512KX16	8K B x 8 or 64K B x 15	512KX16	512KX16	512KX16
Is it Rohs certified?	conform to	-	conform to	conform to	conform to
Parts packaging code	BGA	-	TSOP1	BGA	TSOP1
package instruction	6 X 8 MM, 1 MM HIEGHT, 0.80 MM PITCH, PLASTIC, CBGA-48	-	12 X 20 MM, PLASTIC, MO-142DD, TSOP1-48	6 X 8 MM, 1 MM HIEGHT, 0.80 MM PITCH, PLASTIC, CBGA-48	12 X 20 MM, PLASTIC, MO-142DD, TSOP1-48
Contacts	48	-	48	48	48
Reach Compliance Code	compliant	-	compliant	compliant	compliant
ECCN code	EAR99	-	EAR99	EAR99	EAR99
Maximum access time	70 ns	-	70 ns	70 ns	70 ns
Spare memory width	8	-	8	8	8
startup block	TOP	-	TOP	BOTTOM	BOTTOM
JESD-30 code	R-PBGA-B48	-	R-PDSO-G48	R-PBGA-B48	R-PDSO-G48
JESD-609 code	e1	-	e3	e1	e3
length	8 mm	-	18.4 mm	8 mm	18.4 mm
memory density	8388608 bit	-	8388608 bit	8388608 bit	8388608 bit
Memory IC Type	FLASH	-	FLASH	FLASH	FLASH
memory width	16	-	16	16	16
Humidity sensitivity level	3	-	3	3	3
Number of functions	1	-	1	1	1
Number of terminals	48	-	48	48	48
word count	524288 words	-	524288 words	524288 words	524288 words
character code	512000	-	512000	512000	512000
Operating mode	ASYNCHRONOUS	-	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VFBGA	-	TSOP1	VFBGA	TSOP1
Package shape	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	-	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL	-	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	260	-	260	260	260
Programming voltage	3 V	-	3 V	3 V	3 V
Certification status	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1 mm	-	1.2 mm	1 mm	1.2 mm
Maximum supply voltage (Vsup)	3.6 V	-	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	2.65 V	-	2.65 V	2.65 V	2.65 V
Nominal supply voltage (Vsup)	2.7 V	-	2.7 V	2.7 V	2.7 V
surface mount	YES	-	YES	YES	YES
technology	CMOS	-	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	-	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN SILVER COPPER	-	MATTE TIN	TIN SILVER COPPER	MATTE TIN
Terminal form	BALL	-	GULL WING	BALL	GULL WING
Terminal pitch	0.8 mm	-	0.5 mm	0.8 mm	0.5 mm
Terminal location	BOTTOM	-	DUAL	BOTTOM	DUAL
Maximum time at peak reflow temperature	40	-	40	40	40
type	NOR TYPE	-	NOR TYPE	NOR TYPE	NOR TYPE
width	6 mm	-	12 mm	6 mm	12 mm

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