21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT646T/648T/651T/652T
Ω
(25Ω Series PI74FCT2646T/2652T
PI74FCT646/648/651/652T
(25Ω Series) P174FCT2646T/2652T
Ω
OCTAL REGISTERED TRANSCEIVERS
Fast CMOS Octal Registered Transceivers
Product Features:
• PI74FCT646T/648T/651T/652T/2646T/2652T is pin compatible
with bipolar FAST™ Series at a higher speed and lower power
consumption
• 25Ω series resistor on all outputs (FCT2XXX only)
• TTL input and output levels
• Low ground bounce outputs
• Extremely low static power
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Packages available:
– 24-pin 300 mil wide plastic DIP (P)
– 24-pin 150 mil wide plastic QSOP (Q)
– 24-pin 150 mil wide plastic TQSOP (R)
– 24-pin 300 mil wide plastic SOIC (S)
• Device models available upon request
Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are
produced in the Company’s advanced 0.6/0.8 micron CMOS
technology, achieving industry leading speed grades. All
PI74FCT2XXX devices have a built-in 25-ohm series resistor on
all outputs to reduce noise because of reflections, thus eliminating
the need for an external terminating resistor.
The PI74FCT646T/648T/651T/652T and PI74FCT2646T/2652T
are designed with a bus transceiver with 3-state D-type flip-flops
and control circuitry arranged for multiplexed transmission of data
directly from the data bus or from the internal storage registers. The
PI74FCT651/652T/2652T utilize GAB and GBA signals to control
the transceiver functions. The PI74FCT646/2646T/648T utilize
the enable control (G) and direction pins (DIR) to control the
transceiver functions. SAB and SBA control pins are used to select
either real-time or stored data transfer. The circuitry used for select
control will eliminate the typical decoding glitch that occurs in a
multiplexer during the transition between real-time and stored data.
A low input level selects real-time data and a high selects stored
data.
The PI74FCT646T is a non-inverting option of the PI74FCT648T.
The PI74FCT652T is a non-inverting option of the PI74FCT651T.
Logic Block Diagram
PI74FCT651/652 ONLY
GBA
PI74FCT646/648
ONLY
G
GAB
DIR
CPBA
SBA
CPAB
SAB
1 OR 8 CHANNELS
B REG
0D
C
0
B
0
A REG
A
0
0D
C
0
PI74FCT651/652 ONLY
646/652
ONLY
646/652
ONLY
TO 7 OTHER CHANNELS
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PI74FCT646/648/651/652T
(25Ω Series) P174FCT2646T/2652T
Ω
OCTAL REGISTERED TRANSCEIVERS
Product Pin Description
Pin Name
A
0
-A
7
B
0
-B
7
CPAB, CPBA
SAB, SBA
DIR, G
GAB, GBA
GND
V
CC
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
(646/648/2646)
Output Enable Inputs
(651/652/2652)
Ground
Power
DATA I/O
(2)
PI74FCT646/648T
Product Pin Configuration
CPAB
SAB
DIR
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
CPBA
SBA
G
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
PI74FCT651/652T
Product Pin Configuration
CPAB
SAB
GAB
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
CPBA
SBA
GBA
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
24-PIN
P24
Q24
R24
S24
24-PIN
P24
Q24
R24
S24
PI74FCT646/648/2646T Truth Table
PI74FCT646/2646T
Function/Operation
Isolation
Store A and B Data
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
PI74FCT648T
Function/Operation
Isolation
Store A and B Data
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
G
H
H
L
L
L
L
DIR
X
X
L
L
H
H
Inputs
CPAB CPBA SAB
H or L H or L X
↑
↑
X
X
X
X
X
H or L X
X
X
L
H or L
X
H
SBA
X
X
L
H
X
X
A0-A7
Input
Output
Input
B0-B7
Input
Input
Output
PI74FCT651/652/2652T Truth Table
PI74FCT651T
Function/Operation
Isolation
Store A and B Data
Store A, Hold B
Store A in Both Registers
(3)
Hold A, Store B
Store B in Both Registers
(4)
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus and
Stored B Data to A Bus
1.
PI74FCT652/2652T
Function/Operation
GAB
Isolation
L
Store A and B Data
L
Store A, Hold B
X
Store A in Both Registers
H
Hold A, Store B
L
Store B in Both Registers
L
Real Time B Data to A Bus
L
Stored B Data to A Bus
L
Real Time A Data to B Bus
H
Stored A Data to B Bus
H
Stored A Data to B Bus and
H
Stored B Data to A Bus
Inputs
DATA I/O
(2)
GBA
H
H
H
H
X
L
L
L
H
H
L
CPAB
H or L
↑
↑
↑
H or L
↑
X
X
X
H or L
H or L
CPBA SAB
H or L X
↑
X
H or L X
↑
X
(2)
↑
X
↑
X
X
X
H or L X
X
L
X
H
H or L H
SBA A0-A7
B0-B7
X
Input
Input
X
X
Input Unspecified
(1)
X
Input
Output
(1)
X Unspecified
Input
(2)
X
Output
Input
L
Output
Input
H
X
Input
Output
X
H
Output
Output
2.
3.
4.
The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data
input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition
on the clock inputs.
Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered in order to load both registers.
A in B Register
B in A Register
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PI74FCT646/648/651/652T
(25Ω Series) P174FCT2646T/2652T
Ω
OCTAL REGISTERED TRANSCEIVERS
REAL-TIME TRANSFER
BUS B TO A
REAL-TIME TRANSFER
BUS A TO B
BUS
A
BUS
B
BUS
A
BUS
B
646/648/
2646
DIR
L
G
L
CPAB CPBA
X
X
SAB
X
SAB
X
SBA
L
SBA
L
646/648/
2646
DIR
H
G
L
CPAB CPBA
X
X
SAB
L
SAB
L
SBA
X
SBA
X
651/652/ GAB GBA CPAB CPBA
2652
L
L
X
X
STORAGE FROM
A AND/OR B
651/652/ GAB GBA CPAB CPBA
2652
H
H
X
X
TRANSFER STORES
DATA TO A AND/OR B
BUS
A
BUS
B
BUS
A
BUS
B
646/648/
2646
DIR
H
L
X
G
L
L
H
CPAB CPBA
↑
X
X
↑
↑
↑
SAB
X
X
X
SAB
X
X
X
SBA
X
X
X
SBA
X
X
X
646/648
(1)
DIR
2646
L
H
G
L
L
CPAB CPBA
X
H or L
H or L
X
SAB
X
H
SAB
H
SBA
H
X
SBA
H
651/652/ GAB GBA CPAB CPBA
2652
X
H
↑
X
L
X
X
↑
L
H
↑
↑
651/652/ GAB GBA CPAB CPBA
2652
H
L H or L H or L
1. Note: The FCT646/2646 cannot transfer data to
A bus and B bus simultaneously.
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PI74FCT646/648/651/652T
(25Ω Series) P174FCT2646T/2652T
Ω
OCTAL REGISTERED TRANSCEIVERS
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................................................. –65°C to +150°C
Ambient Temperature with Power Applied ................................. -40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V
DC Input Voltage ......................................................................... –0.5V to +7.0V
DC Output Current ................................................................................... 120 mA
Power Dissipation ......................................................................................... 0.5W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 5.0V ± 5%)
Parameters Description
V
OH
V
OL
V
OL
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OFF
I
OS
V
H
Output HIGH Voltage
Output LOW Current
Output LOW Current
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance
Output Current
Clamp Diode Voltage
Power Down Disable
Short Circuit Current
Input Hysteresis
V
CC
= Min., I
IN
= –18 mA
V
CC
= GND, V
OUT
= 4.5V
V
CC
= Max.
(3)
, V
OUT
= GND
—
–60
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= M
AX
.
V
IN
= V
CC
V
IN
= GND
V
OUT
= 2.7V
V
OUT
= 0.5V
–0.7
—
–120
200
I
OH
= –15.0 mA
I
OL
= 64 mA
I
OL
= 12 mA (25Ω Series)
2.0
0.8
1
–1
1
–1
–1.2
100
Min. Typ
(2)
Max. Units
2.4
3.0
0.3
0.3
0.55
0.50
V
V
V
V
V
µA
µA
µA
µA
V
µA
mA
mV
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(4)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
6
8
Max.
10
12
Units
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
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PI74FCT646/648/651/652T
(25Ω Series) P174FCT2646T/2652T
Ω
OCTAL REGISTERED TRANSCEIVERS
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
V
CC
= Max.
V
CC
= Max.,
V
CC
= Max.,
Outputs Open
G = DIR = GND or
GAB = GBA = GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
CP
= 10 MH
Z
50% Duty Cycle
G = DIR = GND or
GAB = GBA = GND
f
I
= 5 MH
Z
One Bit Toggling
V
CC
= Max.,
Outputs Open
f
CP
= 10 MH
Z
50% Duty Cycle
G = DIR = GND or
GAB = GBA = GND
Eight Bits Toggling
f
I
= 2.5 MH
Z
50% Duty Cycle
Test Conditions
(1)
V
IN
= GND
or V
CC
V
IN
= 3.4V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
Typ
(2)
0.1
0.5
0.15
Max.
500
2.0
0.25
Units
µA
mA
mA/
MHz
I
C
Total Power Supply
Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
1.5
3.5
(5)
mA
2.0
5.5
(5)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
3.8
7.3
(5)
6.0
16.3
(5)
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
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