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M4A5-128/64-65YC

Description
EE PLD, 6.5ns, 128-Cell, CMOS, PQFP100,
CategoryProgrammable logic devices    Programmable logic   
File Size2MB,53 Pages
ManufacturerVantis Corporation
Download Datasheet Parametric View All

M4A5-128/64-65YC Overview

EE PLD, 6.5ns, 128-Cell, CMOS, PQFP100,

M4A5-128/64-65YC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerVantis Corporation
Reach Compliance Codeunknown
Other features128 MACROCELLS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK; PROGRAMMABLE POLARITY
maximum clock frequency95.2 MHz
In-system programmableYES
JESD-30 codeR-PQFP-G100
JESD-609 codee0
JTAG BSTYES
Dedicated input times2
Number of I/O lines64
Number of macro cells128
Number of terminals100
Maximum operating temperature70 °C
Minimum operating temperature
organize2 DEDICATED INPUTS, 64 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeQFP
Encapsulate equivalent codeQFP100,.63SQ,20
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programmable logic typeEE PLD
propagation delay6.5 ns
Certification statusNot Qualified
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
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