UPSD3335BV-24T1T datasheet, PDF

Datasheet> All Categories > semiconductor> The embedded processor and controller> UPSD3335BV-24T1T

UPSD3335BV-24T1T: Description8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP80; Categorysemiconductor The embedded processor and controller; File Size1MB，189 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

Download Datasheet Parametric View All

UPSD3335BV-24T1T Overview

8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP80

UPSD3335BV-24T1T Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	80
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	3 V
Rated supply voltage	3.3 V
External data bus width	8
Number of input and output buses	63
Line speed	24 MHz
Processing package description	ROHS COMPLIANT, plastic, TQFP-80
Lead-free	Yes
EU RoHS regulations	Yes
state	DISCONTINUED
packaging shape	SQUARE
Package Size	FLATPACK, LOW PROFILE, FINE PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
terminal coating	MATTE Tin
Terminal location	Four
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
ADC channel	Yes
Address bus width	12
Number of digits	8
Maximum FCLK clock frequency	40 MHz
Microprocessor type	Microcontroller
PWM channel	Yes
ROM programming	FLASH

Preview

Download Datasheet

View All

UPSD3234A, UPSD3234BV

UPSD3233B, UPSD3233BV

Flash programmable system devices

with 8032 MCU and 64 Kbit SRAM

Features

■

Fast 8-bit 8032 MCU

– 40 MHz at 5.0 V, 24 MHz at 3.3 V

– Core, 12-clocks per instruction

Dual Flash memories with memory

management

– Place either memory into 8032 program

address space or data address space

– Read-while-write operation for in-

application programming and EEPROM

emulation

– Single voltage program and erase

– 100,000 minimum erase cycles, 15-year

retention

Clock, reset, and supply management

– Normal, idle, and power down modes

– Power-on and low voltage reset supervisor

– Programmable watchdog timer

Programmable logic, general-purpose

– 16 macrocells

– Implements state machines, glue-logic, etc.

Timers and interrupts

– Three 8032 standard 16-bit timers

– 10 Interrupt sources with two external

interrupt pins

■

LQFP52 (T)

52-lead, thin,

quad flat package

■

LQFP80 (U)

80-lead, thin, quad

flat package

A/D converter

– Four channels, 8-bit resolution, 10 µs

Communication interfaces

– USB v1.1, low-speed 1.5 Mbps,

3 endpoints

– I

C master/slave bus controller

– Two UARTs with independent baud rate

– Six I/O ports with up to 46 I/O pins

– 8032 address/data bus available on

TQFP80 package

– 5 PWM outputs, 8-bit resolution

JTAG in-system programming

– Program the entire device in as little as

10 seconds

Single supply voltage

– 4.5 to 5.5 V

– 3.0 to 3.6 V

ECOPACK® packages

■

Table 1.

Device summary

Max. clock 1st

2nd

8032

SRAM GPIO USB

(V)

(MHz)

Flash Flash

bus

128 KB 32 KB

256 KB 32 KB

8 KB

Yes

Pkg.

Temp.

Order code

UPSD3233B-40T6

UPSD3233BV-24T6

UPSD3233B-40U6

UPSD3233BV-24U6

UPSD3234A-40T6

UPSD3234A-40U6

UPSD3234BV-24U6

4.5-5.5 TQFP52 –40°C to 85°C

3.0-3.6 TQFP52 –40°C to 85°C

4.5-5.5 TQFP80 –40°C to 85°C

3.0-3.6 TQFP80 –40°C to 85°C

4.5-5.5 TQFP52 –40°C to 85°C

4.5-5.5 TQFP80 –40°C to 85°C

3.0-3.6 TQFP80 –40°C to 85°C

January 2009

Rev 5

1/189

www.st.com

Contents

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV

Contents

UPSD323xx description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1

52-pin package I/O port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Architecture overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.1

2.2

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

2.2.6

2.2.7

Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

B register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Stack pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Program counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Program status word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Registers R0~R7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Data pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.3

2.4

2.5

2.6

2.7

2.8

2.9

Program memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Data memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

XRAM-DDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

XRAM-PSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Addressing modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.9.1

2.9.2

2.9.3

2.9.4

2.9.5

2.9.6

Direct addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Indirect addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Immediate constants addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Indexed addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.10

2.11

2.12

Arithmetic instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Logical instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Data transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2.12.1

2.12.2

2.12.3

Internal RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

External RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Lookup tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2.13

2/189

Boolean instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV

Contents

2.14

2.15

2.16

Relative offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Jump instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Machine cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

UPSD323xx hardware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

MCU module description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.1

Special function registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Interrupt system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

5.1

5.2

5.3

5.4

5.5

5.6

5.7

5.8

5.9

5.10

5.11

External Int0 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Timer 0 and 1 interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Timer 2 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

C interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

External Int1 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

DDC interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

USB interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

USART interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Interrupt priority structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Interrupt enable structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

How interrupts are handled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Power-saving mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

6.1

6.2

6.3

6.4

6.5

Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Power control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

I/O ports (MCU module) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

7.1

Port type and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Supervisory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

3/189

Contents

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV

9.1

9.2

9.3

9.4

External reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Low V

voltage reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Watchdog timer overflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

USB reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Timer/counters (Timer 0, Timer 1 and Timer 2) . . . . . . . . . . . . . . . . . . 59

11.1

Timer 0 and Timer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

11.1.1

11.1.2

11.1.3

11.1.4

Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

11.2

Timer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Standard serial interface (UART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

12.1

12.2

Multiprocessor communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Serial port control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

12.2.1

12.2.2

12.2.3

12.2.4

12.2.5

12.2.6

Baud rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Using Timer 1 to generate baud rates . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Using Timer/counter 2 to generate baud rates . . . . . . . . . . . . . . . . . . . 68

More about Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

More about Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

More about Modes 2 and 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Analog-to-digital convertor (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

13.1

ADC interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Pulse width modulation (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

14.1

14.2

14.3

4-channel PWM unit (PWM 0-3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Programmable period 8-bit PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

PWM 4-channel operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

15.1

15.2

Serial status register (SxSTA: S1STA, S2STA) . . . . . . . . . . . . . . . . . . . . 86

Data shift register (SxDAT: S1DAT, S2DAT) . . . . . . . . . . . . . . . . . . . . . . . 86

4/189

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV

Contents

15.3

Address register (SxADR: S1ADR, S2ADR) . . . . . . . . . . . . . . . . . . . . . . 87

DDC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

16.1

Special Function register for the DDC interface . . . . . . . . . . . . . . . . . . . . 89

16.1.1

16.1.2

DDCDAT register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

DDCADR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

16.2

16.3

16.4

Host type detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

DDC1 protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

DDC2B protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

USB hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

17.1

17.2

USB related registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

17.2.1

17.2.2

USB physical layer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Low speed driver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

17.3

17.4

Receiver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

External USB pull-up resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

PSD module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

18.1

18.2

Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

In-system programming (ISP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Development system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

PSD module register description and address offset . . . . . . . . . . . . 110

PSD module detailed operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Memory blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

22.1

22.2

Primary Flash memory and secondary Flash memory description . . . . 112

Memory block select signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

22.2.1

22.2.2

Ready/Busy (PC3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Memory operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

22.3

22.4

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Power-down instruction and Power-up mode . . . . . . . . . . . . . . . . . . . . . 115

22.4.1

Power-up mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

5/189

Recommended Resources

Ground tester circuit diagram

Field strength meter circuit diagram

Xigui PZL60A, PZL70A electric pump electric hot water bottle machine wiring diagram

Circuit diagram of external drive transistor

Differential Line Driver

Water dispenser circuit diagram 03

NRF24LE1 please advise.: I've been studying NRF24LE1 recently and I'm interested in its internal encryption and decryption coprocessor, but there's not much information about it in books and technical manuals. It looks like t...; zhangya0916 RF/Wirelessly

OB3330XCP has a current error of ±10% when used as a 60W LED driver power supply: [color=#333333][font=Arial, 微软雅黑]Hello guys, please help me figure out what's going on. [/font][/color] [font=Arial, 微软雅黑][color=#333333]I've recently been making a 60W power supply, the IC I use is O...; pengdaiyun Power technology

【microbit】Make a talking Dalek: From: [url=http://blog.withcode.uk/2016/12/code-your-own-ticklish-talking-dalek-microbit-python-speech/]http://blog.withcode.uk/2016/12/ ... obit-python-speech/[/url] Make a talking Dalek (a character...; dcexpert MicroPython Open Source section

"Community Lecture" Logic Synthesis for High Design Reliability in DO-254 (I): I saw a discussion about DO-254 in the forum. I have a certain understanding of this. I would like to share with you the logic synthesis part of high design reliability. Welcome to discuss! [align=lef...; 心仪 FPGA/CPLD

String conversion: How to convert char to lpctstr...; coffeewjf Embedded System

Can I2C's own address register be set to an arbitrarily set address to represent the I2C address?: Can I2C's own address register be set to an arbitrarily set address to represent the I2C address?...; electrics stm32/stm8

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components