IDT54/74FCT821AT/BT/CT
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS
10-BIT BUFFER
IDT54/74FCT827AT/BT/CT
FEATURES:
•
•
•
•
DESCRIPTION:
•
•
•
•
•
A, B, and C grades
Low input and output leakage
≤
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Power off disable outputs permit "live insertion"
Available in the following packages:
– Industrial: SOIC, SSOP, QSOP, TSSOP
– Military: CERDIP, LCC
The FCT827T is built using an advanced dual metal CMOS technology.
The FCT827T 10-bit bus drivers provide high-performance bus inter-
face buffering for wide data/address paths or buses carrying parity. The 10-
bit buffers have NAND-ed output enables for maximum control flexibility.
All of the FCT827T high-performance interface family are designed for
high-capacitance load drive capability, while providing low-capacitance
bus loading at both inputs and outputs. All inputs have clamp diodes to
ground and all outputs are designed for low-capacitance bus loading in
high-impedance state.
FUNCTIONAL BLOCK DIAGRAM
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
OE
1
OE
2
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
JUNE 2002
DSC-5484/2
© 2002 Integrated Device Technology, Inc.
IDT54/74FCT821AT/BT/CT
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
PIN CONFIGURATION
OE
1
NC
D
1
D
0
Y
0
27
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
GND
2
3
4
5
6
7
8
9
10
11
12
23
22
21
20
19
18
17
16
15
14
13
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
OE
2
D
2
D
3
D
4
NC
D
5
D
6
D
7
5
6
7
8
9
10
11
12
13
14
15
16
17
18
4
3
2
1
28
26
25
24
23
22
21
20
19
Y
1
OE
1
1
24
V
CC
INDEX
Vcc
Y
2
Y
3
Y
4
NC
Y
5
Y
6
Y
7
D
8
D
9
GND
OE
2
Yx
L
H
Z
Z
NC
Y
9
CERDIP/ SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
PIN DESCRIPTION
Pin Name
OEx
Dx
Yx
I/O
I
I
O
Description
When both are LOW, the outputs are enabled. When
either one or both are HIGH, the outputs are High Z.
10-bit data input
10-bit data output
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
FUNCTION TABLE
(1)
Inputs
OE
1
L
L
H
OE
2
L
L
X
H
Dx
L
H
X
X
Outputs
Function
Transparent
3-State
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
X
NOTE:
1. This parameter is measured at characterization but not tested.
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2
Y
8
IDT54/74FCT821AT/BT/CT
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
High Impedance Output Current
(3-State output pins)
(4)
Input HIGH Current
(4)
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min, I
IN
= -18mA
—
V
CC
= Max., V
IN
= GND or V
CC
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
Min.
2
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
200
0.01
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
µA
V
mV
µA
Unit
V
V
µA
µA
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
= Min
V
IN
= V
IH
or V
IL
Test Conditions
(1)
I
OH
= –6mA MIL
I
OH
= –8mA IND
I
OH
= –12mA MIL
I
OH
= –15mA IND
I
OL
= 32mA MIL
I
OL
= 48mA IND
Min.
2.4
2
—
–60
Typ.
(2)
3.3
3
0.3
–120
Max.
—
—
0.5
–225
V
mA
Unit
V
V
OL
I
OS
Output LOW Voltage
Short Circuit Current
V
CC
= Min
V
IN
= V
IH
or V
IL
V
CC
= Max., V
O
= GND
(3)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A
= –55°C.
3
IDT54/74FCT821AT/BT/CT
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
1
=
OE
2
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi= 10MHz
50% Duty Cycle
OE
1
=
OE
2
= GND
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OE
1
=
OE
2
= GND
Eight Bits Toggling
V
IN
= V
CC
V
IN
= GND
Test Conditions
(1)
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
—
1.5
1.8
3.5
4.5
mA
—
3
6
(5)
—
5
14
(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input; (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
∆I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2+ f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Output Frequency
N
i
= Number of Outputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT821AT/BT/CT
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
t
PLH
t
PHL
Parameter
Propagation Delay
Dx to Yx
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
C
L
= 300pF
(3)
R
L
= 500Ω
C
L
= 50pF
R
L
= 500Ω
C
L
= 300pF
(3)
R
L
= 500Ω
C
L
= 5pF
(3)
R
L
= 500Ω
C
L
= 50pF
R
L
= 500Ω
54/74FCT827AT
Ind.
Mil.
Min.
(2)
Max. Min.
(2)
Max.
1.5
8
1.5
9
1.5
1.5
1.5
1.5
1.5
15
12
23
9
10
1.5
1.5
1.5
1.5
1.5
17
13
25
9
10
54FCT827BT
Mil.
Min.
(2)
Max.
1.5
6.5
1.5
1.5
1.5
1.5
1.5
14
9
16
7
8
54/74FCT827CT
Ind.
Mil.
Min.
(2)
Max. Min.
(2)
Max. Unit
1.5
4.4
1.5
5
ns
1.5
1.5
1.5
1.5
1.5
10
7
14
5.7
6
1.5
1.5
1.5
1.5
1.5
11
8
15
6.7
7
ns
ns
t
PZH
t
PZL
Output Enable Time,
OEx
to Yx
t
PHZ
t
PLZ
Output Disable Time,
OEx
to Yx
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This condition is guaranteed but not tested.
5
MCU
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