Low Voltage Positive Emitter Coupled Logic Oscillators
57SMO
(+2.5V or +3.3V FIXED LVPECL MODELS)
57SMO
STANDARD SPECIFICATIONS
Item
Generic part number
Frequency range
Frequency stability
(0˚C to
＋70˚C)
over all conditions
Operating Conditions
Operating temperature
Input voltage (V
DD
)
Specifications
57SMO
※1
40.000 MHz to 300.000 MHz
57SMO(A) :
±100
ppm
57SMO(B) :
±50
ppm
57SMO(C) :
±30
ppm
57SMO(D) :
±25
ppm
0˚C to
＋70˚C(Standard)
-40˚C to
＋85˚C
(W)
＋2.5V
DC
±5%
＋3.3V
DC
±5%
V
IH
: 70%V
DD
min.
V
IL
: 30%V
DD
max.
※2
-0.5V to
＋5.0V
DC
-50˚C to
＋125˚C
90 mA max.
30μA max.
40% to 60%
45% to 55%
1 ns max. (20% to 80% of amplitude)
V
OL
:
＋1.745V
max.
V
OL
:
＋1.195V
max.
V
OH
:
＋2.215V
min.
V
OH
:
＋1.415V
min.
50Ωinto V
DD
-2V
200 ns max.
10 ms max.
10 ms max.
1 ps max.
±5
ppm max. at
＋25˚C ±3˚C
for first year
＋250˚C ±10˚C
for 10 seconds
＋170˚C ±10˚C
for 1 to 2 minutes (preheating)
STANDARD SMD CLOCK OSCILLATORS
LVPECL
CLK OSC
Actual Size
57SMO
7.0±0.2
#6
#5
#4
5.0±0.2
Stand-by control voltage (Pin#1)
#1
#2
#3
1.14 1.14
0.26
1.4
1.4
1.4
#1
#6
#2
#5
2.54 2.54
5.08
PIN
1
2
3
4
5
6
CONNECTION
"L"
OPEN or "H"
N.C.
GND
Z
OUTPUT
Z
C-OUTPUT
V
DD
Z : high impedance
#3
#4
1.2 2.6 1.2
OUTPUT WAVEFORM(1)
Termination : 50Ωimpedance matching
t
TR
T
V
PP
TF
VOH
80% V
PP
50% V
PP
VOL
V
DD
-2V
20% V
PP
Absolute Max. Ratings
Supply voltage
Storage temperature
Input current (Pin #1 = Open or V
IH
)
Stand-by current
※2
(Pin #1 = V
IL
)
Output (0˚C to
＋70˚C)
Symmetry (at crossing point)
Rise and fall times
"0" level
"1" level
Load
Disable delay time
Enable delay time
Startup time
RMS jitter (12 kHz to 20 MHz band)
Aging
Reflow condition
1.7max.
(※1) Final exact part number to be determined with frequency, frequency stability, operating temperature and input voltage.
e.g. 57SMO(3.3VB)W 155.520 MHz.
(※2) Internal crystal oscillation to be halted (Pin #1=V
IL
).
Symmetry=t/T×100(%)
PACKAGE DATA
Item
Package
57SMO
Metal
Seam
Tungsten (metalized)
Gold / Nickel
(surface) / (under)
Compliant (Pb-free)
1.6
1.6
SOLDERING PATTERN
1.6 0.94 1.6 0.94 1.6
OUTPUT WAVEFORM(2)
Termination : high impedance probes
t
TR
T
V
PP
TF
VOH
80% V
PP
50% V
PP
VOL
GND
20% V
PP
Lid
Base
Sealing
Terminal
Terminal plating
RoHS
Ceramic
2.2
0.01μF
∼
0.1μF
2.54
5.08
2.54
Symmetry=t/T×100(%)
TEST CIRCUIT(1)
T.P.
A
V
DD1
0.1μF 0.01μF
TRI-
STATE
TEST CIRCUIT(2)
T.P.
R1
A
V
DD
50Ω
0.1μF
#6
V
DD
TRI-
STATE
TAPE SPECIFICATIONS
4.0±0.1
0.1
φ
1.5
+-
0
1.75±0.1
D
J
L
2.0±0.1
#6
V
DD
#4
#5
OUTPUT
R2
T.P.
OUTPUT
OUTPUT
#5
OUTPUT
Termination : 50Ωimpedance matching
#2
GND
#1
N.C.
#3
E/D
SW
R3
R4
A
M
B
F
V
DD
+3.3V
+2.5V
V
DD
1
+2.0V
+2.0V
V
DD
2
-1.3V
-0.5V
Termination : high impedance probes
A
B
C
D
F
J
L
V
DD
R
1
R
2
+3.3V 130Ω 130Ω
+2.5V 270Ω 270Ω
R
3
82Ω
62Ω
R
4
82Ω
62Ω
M Reel Dia. Qty/Reel
245
1000pcs
7.5 5.5 16.0 7.5 8.0 2.0 0.3 2.2
Note : R
3
& R
4
to change for the use of low impedance probes
90
C
V
DD2
0.1μF 0.01μF
#2
GND
#1
N.C.
#3
E/D
50Ω
SW
#4
T.P.
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