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K3N4C1000D-TC10

Description
MASK ROM, 512KX16, 100ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44
Categorystorage    storage   
File Size48KB,3 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

K3N4C1000D-TC10 Overview

MASK ROM, 512KX16, 100ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

K3N4C1000D-TC10 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeTSOP2
package instructionTSOP2, TSOP44,.46,32
Contacts44
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time100 ns
Other featuresCONFIGURABLE AS 512K X 16
Spare memory width8
JESD-30 codeR-PDSO-G44
JESD-609 codee0
length18.41 mm
memory density8388608 bit
Memory IC TypeMASK ROM
memory width16
Number of functions1
Number of terminals44
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize512KX16
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP44,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.00005 A
Maximum slew rate0.05 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
K3N4C1000D-TC(E)
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM
FEATURES
Switchable organization
1,048,5762 x 8(byte mode)
524,288 x 16(word mode)
Fast access time : 100ns(Max.)
Supply voltage : single +5V
Current consumption
Operating : 50mA(Max.)
Standby : 50µA(Max.)
Fully static operation
All inputs and outputs TTL compatible
Three state outputs
Package
-. K3N4C1000D-TC(E) : 44-TSOP2-400
CMOS MASK ROM
GENERAL DESCRIPTION
The K3N4C1000D-TC(E) is a fully static mask programmable
ROM fabricated using silicon gate CMOS process technology,
and is organized either as 1,048,576 x8 bit(byte mode) or as
524,288 x16 bit(word mode) depending on BHE voltage
level.(See mode selection table)
This device operates with a 5V single power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The K3N4C1000D-TC(E) is packaged in a 44-TSOP2.
FUNCTIONAL BLOCK DIAGRAM
PRODUCT INFORMATION
Product
K3N4C1000D-TC
K3N4C1000D-TE
Operating
Temp Range
0°C~70°C
-20°C~85°C
Vcc Range
(Typical)
5.0V
Speed
(ns)
100
A
18
.
.
.
.
.
.
.
.
A
0
A
-1
X
BUFFERS
AND
DECODER
MEMORY CELL
MATRIX
(524,288x16/
1,048,576x8)
Y
BUFFERS
AND
DECODER
SENSE AMP.
DATA OUT
BUFFERS
PIN CONFIGURATION
N.C
A
18
A
17
A
7
A
6
A
5
A
4
A
3
1
2
3
4
5
6
7
8
44 N.C
43 N.C
42 A
8
41 A
9
40 A
10
39 A
11
38 A
12
37 A
13
36 A
14
35 A
15
34 A
16
33 BHE
32 V
SS
31 Q
15
/A
-1
30 Q
7
29 Q
14
28 Q
6
27 Q
13
26 Q
5
25 Q
12
24 Q
4
23 V
CC
. . .
CE
OE
BHE
CONTROL
LOGIC
Q
0
/Q
8
Q
7
/Q
15
A
2
9
A
1
10
A
0
11
Pin Name
A
0
- A
18
Q
0
- Q
14
Q
15
/A
-1
BHE
CE
OE
V
CC
V
SS
N.C
Pin Function
Address Inputs
Data Outputs
Output 15(Word mode)/
LSB Address(Byte mode)
Word/Byte selection
Chip Enable
Output Enable
Power ( +5V)
Ground
No Connection
CE 12
V
SS
13
OE 14
Q
0
15
Q
8
16
Q
1
17
Q
9
18
Q
2
19
Q
10
20
Q
3
21
Q
11
22
TSOP2
K3N4C1000D-TC(E)
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Index Files: 2733  2006  756  1997  2302  56  41  16  47  39 
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