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Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> 843241BM-100
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843241BM-100

Description
Clock Generator, 100MHz, CMOS, PDSO8, 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size446KB，18 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

843241BM-100 Overview

Clock Generator, 100MHz, CMOS, PDSO8, 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8

843241BM-100 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
package instructionSOP,
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresALSO OPERATES TA 3.3 V SUPPLY
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length4.9 mm
Number of terminals8
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency100 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Master clock/crystal nominal frequency25 MHz
Maximum seat height1.75 mm
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width3.9 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER

843241BM-100 Preview

FEMTOCLOCKS™
SAS/SATA CLOCK GENERATOR
ICS843241
G
ENERAL
D
ESCRIPTION
The ICS843241 is a low jitter, high performance clock
generator and a member of the FemtoClocks™ family
HiPerClockS™
of silicon timing products. The ICS843241 is designed
for use in the SAS-2 interconnect and the three
transport protocols that use the SAS-2 interconnect:
Serial SCSI Protocol (SSP), Serial ATA Tunneled Protocol (STP),
and Serial Management Protocol (SMP). The ICS843241 has
excellent (<1ps) RMS phase jitter, over the SAS defined
integration range. The ICS843241 uses an external, 25MHz,
parallel resonant crystal to generate three selectable output
frequencies: 75MHz, 100MHz, 150MHz, and 300MHz. This sili-
con based approach provides excellent frequency stability and
reliability. The ICS843241 features up, down, and center spread
spectrum (SSC) clocking techniques. The up, down and center
SSC will be required in the SAS-2 applications that have three
clock trees in the HBA and expander ASICs (see Applications
Information section, Figure 3).
F
EATURES
•
Designed for use in SAS-2 systems
•
Up, down and center spread spectrum clocking
•
One differential 3.3V or 2.5V LVPECL output pair
•
Selectable output frequencies: 75MHz, 100MHz, 150MHz,
300MHz
•
RMS phase jitter @ 75MHz, (900kHz – 7.5MHz):
0.70ps (typical)
•
3.3V or 2.5V operating supply
•
0°C to 70°C ambient operating temperature
•
Available in lead-free (RoHS 6) packages
IC
S
A
PPLICATIONS
:
• SAS/ SATA Host Bus Adapters
• SATA Port Multipliers
• SAS I/O Controllers
• TapeDrive and HDD Array Controllers
• SAS Edge and Fanout Expanders
• HDDs and Tape Drives
• Disk Storage Enterprise
A
DDITIONAL
O
RDERING
I
NFORMATION
T
ABLE
Part Number
ICS843241BG
ICS843241BM-75
ICS843241BM-100
ICS843241BM-150
ICS843241BM-300
Package
16 TSSOP
8 SOIC
8 SOIC
8 SOIC
8 SOIC
Output Frequency
75MHz, 100MHz, 150MHz, 300MHz
75MHz
100MHz
150MHz
300MHz
P
IN
A
SSIGNMENT
XTAL_OUT
XTAL_IN
SSC_SEL0
SSC_SEL1
1
2
3
4
8
7
6
5
V
EE
nQ
Q
V
CC
B
LOCK
D
IAGRAMS
XTAL_IN
XTAL_OUT
25MHz
75MHz, 100MHz,
150MHz or 300MHz
See Table 10 for
Ordering Information
ICS843241-XXX
8-Lead SOIC, 150 mil
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
OSC
FemtoClock™
PLL
Q
nQ
8-Lead SOIC
SSC_SEL[1:0]
Pulldown
P
IN
A
SSIGNMENT
2
V
EE
XTAL_OUT
XTAL_IN
SSC_SEL0
nc
nc
nc
SSC_SEL1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
F_SEL1
V
EE
nPLL_SEL
nQ
Q
V
CC
F_SEL0
V
CC
F_SEL[1:0]
Pullup:Pulldown
nPLL_SEL
Pulldown
1
XTAL_IN
XTAL_OUT
SSC_SEL[1:0]
Pulldown
25MHz
OSC
FemtoClock™
PLL
0
F_SEL[1:0]
0 0 75MHz
0 1 100MHz
1 0 150MHz
1 1 300MHz
Q
nQ
ICS843241
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm package body
G Package
Top View
16-Lead TSSOP
IDT
™
/ ICS
™
SAS/SATA CLOCK GENERATOR
1
ICS843241BG REV. A AUGUST 20, 2008
ICS843241
FEMTOCLOCKS™ SAS/SATA CLOCK GENERATOR
T
ABLE
1. P
IN
D
ESCRIPTIONS
Name
XTAL_OUT, XTAL_IN
SSC_SEL0, SSC_SEL1
F_SEL0
F_SEL1
nPLL_SEL
nQ, Q
V
EE
V
CC
nc
Input
Input
Input
Input
Input
Output
Power
Power
Unused
Type
Description
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Pulldown SSC select pins. See Table 3A. LVCMOS/LVTTL interface levels.
Pulldown Output frequency select pin. See Table 3B. LVCMOS/LVTTL interface levels.
Pullup
Output frequency select pin. See Table 3B. LVCMOS/LVTTL interface levels.
Differential clock outputs. LVPECL interface levels.
Negative supply pin.
Power supply pin.
No connect.
Pulldown Bypasses the PLL. LVCMOS/LVTTL interface levels.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLDOWN
R
PULLUP
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
T
ABLE
3A. SSC_SEL[1:0] F
UNCTION
T
ABLE
Inputs
SSC_SEL1
0 (default)
0
1
1
SSC_SEL0
0 (default)
1
0
1
Mode
SSC Off
0.5% Down-spread
0.5% Up-spread
0.5% Center-spread
T
ABLE
3B. F_SEL[1:0] F
UNCTION
T
ABLE
Inputs
F_SEL1
0
0
1 (default)
1
F_SEL0
0
1
0 (default)
1
Output Frequency
75MHz
100MHz
150MHz
300MHz
IDT
™
/ ICS
™
SAS/SATA CLOCK GENERATOR
2
ICS843241BG REV. A AUGUST 20, 2008
ICS843241
FEMTOCLOCKS™ SAS/SATA CLOCK GENERATOR
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause per manent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
Package Thermal Impedance,
θ
JA
8 SOIC
96°C/W (0 lfpm)
16 TSSOP
Storage Temperature, T
STG
92.4°C/W (0 mps)
-65°C to 150°C
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
CC
I
EE
Parameter
Power Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
Typical
3. 3
Maximum
3.465
77
Units
V
mA
T
ABLE
4B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
V
CC
I
EE
Parameter
Power Supply Voltage
Power Supply Current
Test Conditions
Minimum
2.375
Typical
2. 5
Maximum
2.625
75
Units
V
mA
T
ABLE
4C. LVCMOS/LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%
OR
2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
V
IH
Parameter
Input High Voltage
Test Conditions
V
CC
= 3.3V
V
CC
= 2.5V
Input Low Voltage
F_SEL0,
nPLL_SEL
SSC_SEL[0:1]
F_SEL1
Input
Low Current
F_SEL0,
nPLL_SEL
SSC_SEL[0:1]
F_SEL1
V
CC
= 3.3V
V
CC
= 2.5V
Input
High Current
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
-5
-150
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
V
CC
+ 0.3
V
CC
+ 0.3
0.8
0.7
150
5
Units
V
V
V
V
µA
µA
µA
µA
V
IL
I
IH
I
IL
IDT
™
/ ICS
™
SAS/SATA CLOCK GENERATOR
3
ICS843241BG REV. A AUGUST 20, 2008
ICS843241
FEMTOCLOCKS™ SAS/SATA CLOCK GENERATOR
T
ABLE
4D. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
T
ABLE
4E. LVPECL DC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.4
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.5
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Test Conditions
Minimum
Typical
Fundamental
25
50
7
MHz
Ω
pF
Maximum
Units
T
ABLE
6A. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
Parameter
Test Conditions
F_SEL[1:0] = 00
f
OUT
Output Frequency
F_SEL[1:0] = 01
F_SEL[1:0] = 10
F_SEL[1:0] = 11
75MHz @ Integration Range:
900kHz - 7.5MHz
100MHz @ Integration Range:
900kHz - 7.5MHz
150MHz @ Integration Range:
900kHz - 7.5MHz
300MHz @ Integration Range:
900kHz - 7.5MHz
20% to 80%
Minimum
Typical
75
100
15 0
300
0.70
0.69
0.69
0.68
335
48
590
52
Maximum
Units
MHz
MHz
MHz
MHz
ps
ps
ps
ps
ps
%
t
jit(Ø)
RMS Phase Jitter ( Random);
NOTE 1
t
R
/ t
F
Output Rise/Fall Time
odc
Output Duty Cycle
NOTE 1: Refer to the Phase Noise Plots.
IDT
™
/ ICS
™
SAS/SATA CLOCK GENERATOR
4
ICS843241BG REV. A AUGUST 20, 2008
ICS843241
FEMTOCLOCKS™ SAS/SATA CLOCK GENERATOR
T
ABLE
6B. AC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
Parameter
Test Conditions
F_SEL[1:0] = 00
f
OUT
Output Frequency
F_SEL[1:0] = 01
F_SEL[1:0] = 10
F_SEL[1:0] = 11
75MHz @ Integration Range:
900kHz - 7.5MHz
RMS Phase Jitter ( Random);
NOTE 1
100MHz @ Integration Range:
900kHz - 7.5MHz
150MHz @ Integration Range:
900kHz - 7.5MHz
300MHz @ Integration Range:
900kHz - 7.5MHz
20% to 80%
Minimum
Typical
75
100
15 0
300
0.72
0.61
0.68
0.64
360
48
500
52
Maximum
Units
MHz
MHz
MHz
MHz
ps
ps
ps
ps
ps
%
t
jit(Ø)
t
R
/ t
F
Output Rise/Fall Time
odc
Output Duty Cycle
NOTE 1: Refer to the Phase Noise Plots.
IDT
™
/ ICS
™
SAS/SATA CLOCK GENERATOR
5
ICS843241BG REV. A AUGUST 20, 2008
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

843241BM-100 Related Products

843241BM-100 843241BM-300 843241BG 843241BM-75 843241BM-150
Description Clock Generator, 100MHz, CMOS, PDSO8, 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8 Clock Generator, 300MHz, CMOS, PDSO8, 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8 Clock Generator, 300MHz, CMOS, PDSO16, 4.40 X 5 MM, 0.92 MM HEIGHT, MO-153, TSSOP-16 Clock Generator, 75MHz, CMOS, PDSO8, 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8 Clock Generator, 150MHz, CMOS, PDSO8, 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8
Is it Rohs certified? incompatible incompatible conform to incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
package instruction SOP, 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8 TSSOP, 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8
Reach Compliance Code compliant compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
Other features ALSO OPERATES TA 3.3 V SUPPLY ALSO OPERATES TA 3.3 V SUPPLY ALSO OPERATES TA 3.3 V SUPPLY ALSO OPERATES TA 3.3 V SUPPLY ALSO OPERATES TA 3.3 V SUPPLY
JESD-30 code R-PDSO-G8 R-PDSO-G8 R-PDSO-G16 R-PDSO-G8 R-PDSO-G8
length 4.9 mm 4.9 mm 5 mm 4.9 mm 4.9 mm
Number of terminals 8 8 16 8 8
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C
Maximum output clock frequency 100 MHz 300 MHz 300 MHz 75 MHz 150 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP TSSOP SOP SOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE
Master clock/crystal nominal frequency 25 MHz 25 MHz 25 MHz 25 MHz 25 MHz
Maximum seat height 1.75 mm 1.75 mm 1.2 mm 1.75 mm 1.75 mm
Maximum supply voltage 2.625 V 2.625 V 2.625 V 2.625 V 2.625 V
Minimum supply voltage 2.375 V 2.375 V 2.375 V 2.375 V 2.375 V
Nominal supply voltage 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 0.65 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL
width 3.9 mm 3.9 mm 4.4 mm 3.9 mm 3.9 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
JESD-609 code e0 e0 - e0 e0
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)

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