MBM29DL400TC-90TN datasheet, PDF

Datasheet> All Categories > storage> storage> MBM29DL400TC-90TN

MBM29DL400TC-90TN: DescriptionFlash, 256KX16, 90ns, PDSO48, PLASTIC, TSOP1-48; Categorystorage storage; File Size522KB，58 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/

Download Datasheet Parametric View All

MBM29DL400TC-90TN Overview

Flash, 256KX16, 90ns, PDSO48, PLASTIC, TSOP1-48

MBM29DL400TC-90TN Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	SPANSION
Parts packaging code	TSOP1
package instruction	TSOP1,
Contacts	48
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	90 ns
Spare memory width	8
startup block	TOP
JESD-30 code	R-PDSO-G48
JESD-609 code	e0
length	18.4 mm
memory density	4194304 bit
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of terminals	48
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX16
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
Programming voltage	3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
type	NOR TYPE
width	12 mm

Preview

Download Datasheet

View All

SPANSION Flash Memory

Data Sheet

September 2003

This document specifies SPANSION memory products that are now offered by both Advanced Micro Devices and

Fujitsu. Although the document is marked with the name of the company that originally developed the specification,

these products will be offered to customers of both AMD and Fujitsu.

Continuity of Specifications

There is no change to this datasheet as a result of offering the device as a SPANSION

revisions will occur when appropriate, and changes will be noted in a revision summary.

product. Future routine

Continuity of Ordering Part Numbers

AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these

products, please use only the Ordering Part Numbers listed in this document.

For More Information

Please contact your local AMD or Fujitsu sales office for additional information about SPANSION

solutions.

memory

MBM29DL400TC/BC

-55/70/90

(Continued)

The standard MBM29DL400TC/BC offer access times 55 ns, 70 ns and 90 ns, allowing operation of high-speed

microprocessors without wait states. To eliminate bus contention the devices feature separate chip enable

(CE) , write enable (WE) , and output enable (OE) controls.

The MBM29DL400TC/BC are pin and command set compatible with JEDEC standard E

PROMs. Commands

are written to the command register using standard microprocessor write timings. Register contents serve as

input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally

latch addresses and data needed for the programming and erase operations. Reading data out of the devices

is similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.

The MBM29DL400TC/BC are programmed by executing the program command sequence. This will invoke the

Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths

and verifies proper cell margin. Typically, each sector can be programmed and verified in about 0.5 seconds.

Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase

Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed

before executing the erase operation. During erase, the devices automatically time the erase pulse widths and

verify proper cell margin.

One sector is typically erased and verified in 1.0 second. (If already completely preprogrammed.)

The devices also feature a sector erase architecture. The sector mode allows each sector to be erased and

reprogrammed without affecting other sectors. The MBM29DL400TC/BC are erased when shipped from the

factory.

The devices feature single 3.0 V power supply operation for both read and write functions. Internally generated

and regulated voltages are provided for the program and erase operations. A low V

detector automatically

inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ

by the Toggle Bit feature on DQ

, or the RY/BY output pin. Once the end of a program or erase cycle is completed,

the devices internally reset to the read mode.

Fujitsu’s Flash technology integrates years of EPROM and E2PROM experience to produce the highest levels

of quality, reliability, and cost effectiveness. The MBM29DL400TC/BC memories electrically erase the entire

chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed

one byte/word at a time using the EPROM programming mechanism of hot electron injection.

Recommended Resources

Y-△ starting circuit for frequently starting motors

Low noise pre-equalization circuit

Use CD4011 and CD4017 to make a touch-type five-speed dimmer

One ABB soft starter starts four motors

6.5kHzLC frequency selective encoder

12V soft start regulated power supply circuit

How to write the source program of eight-way buzzer based on FPGA?: Host control starts ---- 10 seconds countdown ---- user answers ---- display the group number of the answer ---- buzzer and LED indication end ---- prepare for the second answer...; k417482442 FPGA/CPLD

LCD 320240 and ATmega16: This is my first time using an LCD screen (320*240, RA8835). The CPU I use is ATmega16. I just want to display the simplest letters and numbers, but I can't adjust it. Please help me:pleased: The foll...; 凉语儿 Microchip MCU

First look at LPC1343: I received the board yesterday. Today I studied the routines provided by NXP and ran a simple program on the board to light up the only LED, which was red (it would be more beautiful if it was green o...; gumuchixin NXP MCU

Please help me, a newbie.: Experts, please help me, a rookie: the design and simulation of intelligent electronic password locks, I need circuit design drawings and programs. It is best to have the process and results of proteu...; lovetree Embedded System

IC model in "Speed Regulating Fan Circuit Diagram"???: Please tell us the IC model in the "Speed Regulating Fan Circuit Diagram" on this website, thank you very much!!!...; qingge401 DIY/Open Source Hardware

MM32F103 BUG reminder to avoid falling into the pit 2? Please answer: [b]MM32F103 BUG reminder to avoid pitfalls? [/b] [b][color=#5E7384]This content is created by EEWORLD forum user [size=3]54chenjq[/size]. If you need to reprint or use it for commercial purposes, you ...; 54chenjq Motor Drive Control（Motor Control）

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components