NS32GX32ANU-30 datasheet, PDF - EEWORLD Datasheet

NS32GX32ANU-30: Description32-BIT, 30MHz, MICROPROCESSOR, CPGA175, PGA-175; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，93 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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NS32GX32ANU-30 Overview

32-BIT, 30MHz, MICROPROCESSOR, CPGA175, PGA-175

Parameter Name	Attribute value
Maker	Texas Instruments
package instruction	PGA,
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	32
bit size	32
boundary scan	NO
maximum clock frequency	60.24 MHz
External data bus width	32
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	S-CPGA-P175
low power mode	NO
Number of DMA channels
Number of external interrupt devices	3
Number of serial I/Os
Number of terminals	175
On-chip data RAM width
Maximum operating temperature	95 °C
Minimum operating temperature
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	4.699 mm
speed	30 MHz
Maximum slew rate	800 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	OTHER
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR

	NS32GX32ANU-30	NS32GX32ANU-20	NS32GX32ANU-25
Description	32-BIT, 30MHz, MICROPROCESSOR, CPGA175, PGA-175	32-BIT, 20MHz, MICROPROCESSOR, CPGA175, PGA-175	32-BIT, 25MHz, MICROPROCESSOR, CPGA175, PGA-175
Maker	Texas Instruments	Texas Instruments	Texas Instruments
package instruction	PGA,	PGA,	PGA,
Reach Compliance Code	unknown	unknown	unknown
ECCN code	3A001.A.3	3A991.A.2	3A001.A.3
Address bus width	32	32	32
bit size	32	32	32
boundary scan	NO	NO	NO
maximum clock frequency	60.24 MHz	40 MHz	50 MHz
External data bus width	32	32	32
Format	FIXED POINT	FIXED POINT	FIXED POINT
Integrated cache	NO	NO	NO
JESD-30 code	S-CPGA-P175	S-CPGA-P175	S-CPGA-P175
low power mode	NO	NO	NO
Number of external interrupt devices	3	3	3
Number of terminals	175	175	175
Maximum operating temperature	95 °C	95 °C	95 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	PGA	PGA
Package shape	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.699 mm	4.699 mm	4.699 mm
speed	30 MHz	20 MHz	25 MHz
Maximum slew rate	800 mA	575 mA	700 mA
Maximum supply voltage	5.25 V	5.5 V	5.5 V
Minimum supply voltage	4.75 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V
surface mount	NO	NO	NO
technology	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR

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